CY7C1061G30-10ZSXI
Active and preferred
RoHS Compliant

CY7C1061G30-10ZSXI

High-Density 16 Mbit Parallel FAST SRAM with Industrial Qualification and Fast Access Time
Datasheet
package
ea.
in stock

Content could not be loaded

Unfortunately, we were unable to load the content for this section. You may want to refresh the page or try again later.

CY7C1061G30-10ZSXI
CY7C1061G30-10ZSXI
ea.
Datasheet

Product details

  • Density
    16 MBit
  • Family
    FAST SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Pure Sn
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) range
    2.2 V to 3.6 V
  • Operating Voltage range
    2.2 V to 3.6 V
  • Organization (X x Y)
    1M x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial
  • Speed
    10 ns
Recommended
OPN
CY7C1061G30-10ZSXI
Product Status active and preferred
Infineon Package
PG-TSOP-54
Package Name TSOP-II-54 (51-85160)
Packing Size 1080
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free No
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-TSOP-54
Package Name TSOP-II-54 (51-85160)
Packing Size 1080
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
CY7C1061G30-10ZSXI is a 16-Mbit (1M x 16) fast asynchronous SRAM with embedded ECC for single-bit error correction. It operates from 2.2 V to 3.6 V over -40 to 85°C and supports 10 ns access time. Dual chip enables, byte write via BLE/BHE, TTL-compatible I/O, and automatic CE power-down (ISB2 20 mA typ, ICC 90 mA typ at 100 MHz) support data buffering in industrial embedded and networking equipment.

Features

  • 16-Mbit (1M x 16) async SRAM
  • Embedded ECC single-bit correction
  • ERR output flags corrected 1-bit
  • tAA access time 10 ns/15 ns
  • 16-bit I/O with BLE/BHE byte writes
  • Single or dual chip-enable inputs
  • Auto CE power-down (ISB1/ISB2)
  • ICC typ 90 mA at 100 MHz
  • 1.0 V data retention mode
  • TTL-compatible I/O levels
  • Ambient temp -40°C to +85°C
  • ESD > 2001 V (MIL-STD-883)

Benefits

  • ECC improves SRAM data integrity
  • ERR pin simplifies error monitoring
  • 10 ns access supports fast reads
  • Byte writes reduce write bandwidth
  • CE options ease system integration
  • Auto power-down cuts standby draw
  • 1.0 V retention lowers backup power
  • TTL levels ease bus interfacing
  • -40°C to +85°C boosts reliability
  • High ESD improves handling margin
  • Lower active current reduces heat
  • Async SRAM simplifies controller logic
Documents

Design resources

Partner solutions

Developer community