CY62167G30-55BVXET
Active and preferred
RoHS Compliant
Lead-free

CY62167G30-55BVXET

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CY62167G30-55BVXET
CY62167G30-55BVXET

Product details

  • Density
    16 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature range
    -40 °C to 125 °C
  • Operating Voltage (VCCQ) max
    3.6 V
  • Operating Voltage range
    2.2 V to 3.6 V
  • Organization (X x Y)
    1Mb x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Automotive(E)
  • Speed
    55 ns
OPN
CY62167G30-55BVXET
Product Status active and preferred
Infineon Package
Package Name VFBGA-48 (51-85150)
Packing Size 2000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
Package Name VFBGA-48 (51-85150)
Packing Size 2000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
CY62167G30-55BVXET is a 16-Mbit (1M × 16) asynchronous SRAM with embedded ECC for single-bit error correction. It operates from 2.2 V to 3.6 V over -40°C to 125°C (Automotive-E) and supports a 55 ns speed grade. Ultra-low standby current is 5.5 µA typical (75 µA max) with automatic power-down and byte power-down, plus upper/lower byte enables for 8-bit accesses. AEC-Q100 qualified, Pb-free 48-ball VFBGA (tape and reel).

Features

  • 16-Mbit SRAM, 1M × 16
  • Embedded ECC single-bit correction
  • High speed access: 45 ns or 55 ns
  • VCC operating range 2.2 V to 3.6 V
  • Standby current typ 5.5 µA
  • Standby current max 75 µA
  • Data retention at VCC = 1.0 V
  • Data-retention current typ 5.5 µA
  • Dual chip-enable inputs CE1/CE2
  • Byte write via BHE/BLE controls
  • Output tri-state (HI-Z) on deselect
  • OE to data valid 22 ns or 25 ns

Benefits

  • Built-in ECC boosts data integrity
  • 45/55 ns access cuts read latency
  • 2.2-3.6 V fits 3.3 V logic rails
  • 5.5 µA standby extends battery life
  • 75 µA max eases power budgeting
  • 1.0 V retention preserves data
  • CE1/CE2 enables simple bus sharing
  • Byte writes reduce update bandwidth
  • HI-Z outputs prevent bus contention
  • Fast OE improves random read speed
  • Low leakage supports low-power modes
  • -40°C to +125°C supports hot/cold

Applications

Documents

Design resources

Developer community

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