Active and preferred

5962F1120101VXA

Data Sheet
package

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5962F1120101VXA
5962F1120101VXA
Data Sheet

Product details

  • Architecture
    QDR-II+
  • Bank Switching
    N
  • Burst Length (Words)
    2
  • Data Width
    x 18
  • Density
    72 MBit
  • Device weight
    6152.8 mg
  • ECC
    N
  • Family
    QDR-II+
  • Frequency
    250 MHz
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Pb
  • On-Die Termination
    N
  • Operating Temperature
    -55 °C to 125 °C
  • Operating Voltage
    1.7 V to 1.9 V
  • Organization (X x Y)
    4Mb x 18
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Military
  • Read Latency (Cycles)
    2
Recommended
OPN
5962F1120101VXA
Product Status active and preferred
Infineon Package
C-CGA-165
Package Name CCGA-165 (001-58969)
Packing Size 1
Packing Type TRAY
Moisture Level 1
Moisture Packing NON DRY
Lead-free No
Halogen Free No
RoHS Compliant No
Infineon stock last updated:

Product Status
Active
Infineon Package
C-CGA-165
Package Name CCGA-165 (001-58969)
Packing Size 1
Packing Type TRAY
Moisture Level 1
Moisture Packing NON DRY
Lead Free
Halogen Free
RoHS Compliant
Infineon’s 72Mb Quad Data Rate (QDR®)-II+, CYRS154x series, are high performance, synchronous pipelined SRAMs designed with Infineon’s RADSTOP™ technology.  The 72Mb QDR®-II+ memories are available in x18/x36 and two-word/four-word data bus configurations, and provides low latency and random memory access capability for high speed cache applications. Infineon’s radiation hardened memories are QML-V certified, meeting the reliability and lifecycle demands of extreme environments. Our RADSTOPTM memory solutions enhance overall system computing limits while providing Size, Weight, and Power (SWaP) benefits and greater design flexibility. Infineon’s state-of-the art RADSTOP™ technology is radiation hardened through proprietary design and process hardening techniques.

Features

  • 72Mb density, 4M x18 two-word burst mode
  • 250MHz > freq./ 36 Gbps throughput
  • Two independent unidirectional data port
  • Double Data Rate (DDR) port
  • Output impedance matching input
  • Memory core toeliminate multi-bit errors
  • 1.5 V to 1.8 V HSTL I/O signal standards
  • 1.7 V to 1.9 V operating V R
  • –55°C to +125°C military temp. grade
  • 165-ceramic CGA (CCGA)
  • SWaP optimized CCGA package
  • DLAM QML-V qualified SMD 5962-11201

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

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