not for new design
RoHS Compliant
Lead-free

IPDD60R150G7

Double DPAK (DDPAK) Innovative top-side cooled SMD solution for high power applications
Data Sheet
package
board
ea.
in stock

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IPDD60R150G7
IPDD60R150G7
ea.
Data Sheet

Product details

  • Budgetary Price €/1k
    1.24
  • ID max
    16 A
  • ID (@25°C) max
    16 A
  • IDpuls max
    45 A
  • Mounting
    SMT
  • Operating Temperature
    -55 °C to 150 °C
  • Package
    D-DPAK
  • Pin Count
    10 Pins
  • Polarity
    N
  • Ptot max
    95 W
  • Qgd
    8 nC
  • QG (typ @10V)
    23 nC
  • QG
    23 nC
  • RDS (on) max
    150 mΩ
  • RDS (on) (@10V) max
    150 mΩ
  • RthJA max
    62 K/W
  • RthJC max
    1.32 K/W
  • Special Features
    highest performance
  • VDS max
    600 V
  • VGS(th)
    3.5 V
OPN
IPDD60R150G7XTMA1
Product Status not for new design
Infineon Package
PG-HDSOP-10
Package Name D-DPAK
Packing Size 1700
Packing Type TAPE & REEL
Moisture Level 1
Moisture Packing NON DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status not for new design
Infineon Package
PG-HDSOP-10
Package Name D-DPAK
Packing Size 1700
Packing Type TAPE & REEL
Moisture Level 1
Moisture Packing NON DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
Infineon Technologies introduces Double DPAK (DDPAK), the first top-side cooled surface mount device (SMD) package addressing high power SMPS applications such as PC power, solar, server and telecom. The benefits of the already existing high voltage technology 600V CoolMOS™ G7 superjunction (SJ) MOSFET is combined with the innovative concept of top-side cooling, providing a system solution for high current hard switching topologies such as PFC and a high-end efficiency solution for LLC topologies.

Features

  • Best FOM R DS(on) x E oss, R DS(on) x Q G
  • Innovative top-side cooling concept
  • Inbuilt Kelvin source pin
  • Low parasitic source inductance (~1nH)
  • High TCOB capability, MSL1, Pb-free

Benefits

  • Enabling highest energy efficiency
  • Board and MOSFET thermally decoupled
  • Reduced parasitic source inductance
  • Improved efficiency and ease-of-use
  • Enables higher power density solutions
  • Exceeding the highest quality standards

Applications

Power conversion

Documents

Documents

Design resources

Partner solutions

Developer community

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