S28HS02GTFPBHB150
Active and preferred
RoHS Compliant
Lead-free

S28HS02GTFPBHB150

Data Sheet
package

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S28HS02GTFPBHB150
S28HS02GTFPBHB150
Data Sheet

Product details

  • Classification
    ISO 26262-compliant
  • Density
    2 GBit
  • Family
    HS-T
  • Interface Bandwidth
    333 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    166 / 166
  • Interfaces
    Octal
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature range
    -40 °C to 105 °C
  • Operating Voltage range
    1.7 V to 2 V
  • Operating Voltage
    1.8 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2037
  • Qualification
    Automotive
Recommended
OPN
S28HS02GTFPBHB150
Product Status active and preferred
Infineon Package
PG-BGA-24
Package Name FBGA-24 (002-24801)
Packing Size 2600
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-BGA-24
Package Name FBGA-24 (002-24801)
Packing Size 2600
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
S28HS02GTFPBHB150 is a 2 Gbit SEMPER™ NOR Flash (HS‑T, 45‑nm MIRRORBIT™) multi-chip package with stacked 1 Gb dies in a 24‑ball BGA (8 × 8 mm), halogen‑free and RoHS compliant. It supports JESD251 xSPI octal OPI plus legacy SPI, with SDR/DDR clock up to 166 MHz and bandwidth up to 333 MByte/s. Automotive, 1.7 V to 2.0 V, -40°C to 105°C, ISO 26262-compliant, with flexible 4 KB/256 KB sector options.

Features

  • 45-nm MIRRORBIT™ stores 2 bits/cell
  • JEDEC JESD251 xSPI compliant
  • Octal OPI supports SDR and DDR
  • Legacy ×1 SPI supports SDR
  • Data strobe (DS) for read capture
  • Burst reads: wrapped or linear
  • Uniform or hybrid sector architecture
  • Configurable 256/512-byte prog buf
  • OTP secure array 1024 bytes
  • ECC SECDED on array data
  • CRC detects memory array errors
  • SafeBoot init/config recovery

Benefits

  • Higher density in same die area
  • Easier host compatibility via xSPI
  • Higher read throughput in OPI
  • Backward compatible SPI designs
  • Simplifies high-speed timing margin
  • Efficient streaming or page reads
  • Optimizes erase granularity for FW
  • Faster program throughput option
  • Secure storage for keys/IDs
  • Improves data reliability in field
  • Detects corruption for safe action
  • Improves boot robustness, recovery

Applications

Documents

Design resources

Partner solutions

Developer community

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