NEW
Active and preferred
RoHS Compliant
Lead-free

S28HL02GTFGBHI050

NEW
Industrial grade 2 Gb 3 V Octal NOR flash
Data Sheet
package

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S28HL02GTFGBHI050
S28HL02GTFGBHI050
Data Sheet

Product details

  • Density
    2048 MBit
  • Family
    HL-T
  • Interface Bandwidth
    266 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    133 / 133
  • Interfaces
    Octal
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature
    -40 °C to 85 °C
  • Operating Voltage
    3 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2037
  • Qualification
    Industrial
Recommended
OPN
S28HL02GTFGBHI050XQLA1
Product Status active and preferred
Infineon Package
PG-BGA-24
Package Name FBGA-24 (002-15550)
Packing Size 2600
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-BGA-24
Package Name FBGA-24 (002-15550)
Packing Size 2600
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S28HL02GTFGBHI050 is a 2 Gb SEMPER™ NOR Flash using Infineon's 45-nm MIRRORBIT™ technology in a dual-die package. It supports Octal and SPI interfaces, delivers up to 400 MBps DDR read speeds, and operates from 2.7 V to 3.6 V across temperature ranges up to 125°C. Features include ISO 26262 ASIL B compliance, Endurance flex architecture, built-in ECC, and advanced sector protection. It is ideal for automotive and safety-critical applications.

Features

  • Embedded Hamming ECC for error correction
  • 16-byte data unit with 1-bit correction,
  • ECC error reporting via status registers
  • Endurance flex architecture with wear
  • Configurable high endurance or long retention
  • JEDEC JESD251 xSPI compliant interface
  • Supports Octal and legacy SPI interfaces
  • SDR and DDR modes for high-speed access
  • Flexible sector architecture: 4 KB and 256 KB
  • Page programming buffer: 256 or 512 bytes
  • Data integrity check with CRC
  • SafeBoot for initialization and corruption

Benefits

  • ECC improves data reliability and safety
  • 2-bit error detection prevents data
  • Status registers enable fast diagnostics
  • Wear leveling extends device lifetime
  • Flexible endurance/retention for various
  • xSPI compliance ensures broad compatibility
  • Octal/SPI support eases system integration
  • High-speed modes boost data throughput
  • Flexible sectors fit diverse memory maps
  • Large buffer increases programming speed
  • CRC checks enhance data integrity
  • SafeBoot ensures secure startup

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

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