Active and preferred
RoHS Compliant

FM22L16-55-TG

Industrial-grade 4096kBit Parallel FRAM with 55ns speed, ensuring reliable performance in a wide temperature range of -40°C to 85°C.
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in stock

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FM22L16-55-TG
FM22L16-55-TG
ea.

Product details

  • Density
    4 MBit
  • Family
    Parallel FRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Pure Sn
  • Operating Temperature
    -40 °C to 85 °C
  • Operating Voltage (VCCQ)
    2.7 V to 3.6 V
  • Operating Voltage
    2.7 V to 3.6 V
  • Organization (X x Y)
    256Kb x 16
  • Peak Reflow Temp
    260 °C
  • Qualification
    Industrial
  • Speed
    55 ns
OPN
FM22L16-55-TG
Product Status active and preferred
Infineon Package
Package Name TSOP-II-44 (51-85087)
Packing Size 1350
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free No
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
ea. in stock

Product Status
Active
Infineon Package
Package Name TSOP-II-44 (51-85087)
Packing Size 1350
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
Experience over 151 years of data retention with the FM22L16 256K × 16 nonvolatile memory. Its fast write timing, high endurance, and nonvolatile nature eliminate reliability concerns, making it an ideal drop-in replacement for standard SRAM, ensuring superior performance in applications requiring frequent or rapid writes.

Features

  • Configurable as 512K × 8 using UB and LB
  • High-endurance 100 trillion (1014) read/writes
  • 151-year data retention
  • NoDelay™ writes
  • Page mode operation to 25 ns cycle time
  • Advanced high-reliability ferroelectric process
  • SRAM compatible
  • 44-pin thin small outline package (TSOP) Type II
  • Restriction of hazardous substances (RoHS) compliant

Benefits

  • Drop-in replacement for standard SRAM
  • Flexibility in triggering read/write cycles
  • Nonvolatile nature due to ferroelectric process
  • Ideal for frequent or rapid writes
  • Low voltage monitor for data protection
  • Software-controlled write protection
  • Memory array divided into individually write-protected blocks

Documents

Design resources

Developer community

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