EiceDRIVER™ SiC MOSFET Gate Driver ICs

Overview

Gate Driver ICs with perfect fit to CoolSiC™ MOSFET

Ultra-fast switching 1200 V power transistors such as CoolSiC™ MOSFETs can be easier handled by means of isolated gate output sections. Therefore, the following EiceDRIVER™ galvanically isolated gate driver ICs based on our coreless transformer technology are recommended as most suitable.

These drivers incorporate most important key features and parameters for Silicon Carbide MOSFETs driving such as tight propagation delay matching, precise input filters, wide output-side supply range, negative gate voltage capability, extended CMTI capability, active Miller clamp, and DESAT protection.

For a larger selection of galvanically isolated gate drivers, please find the complete list of our EiceDRIVER™ galvanically isolated gate driver ICs.

Products
Highlights

For a larger selection of isolated gate drivers, refer to the product portfolio overview section of our EiceDRIVER™ gate driver selection guide. These drivers incorporate most important key features and parameters for CoolSiC™ MOSFETsdriving such as tight propagation delay matching, precise input filters, wide output-side supply range, negative gate voltage capability, extended CMTI capability, active Miller clamp, and DESAT protection.

Features Applications
  • Available in wide body package with 8 mm creepage distance
  • Suitable for operation at high ambient temperature
  • Active Miller clamp
  • Short circuit clamping and active shutdown
  • ≥ 100 kV/μs CMTI (1EDU20I12SV: ≥ 50 kV/μs CMTI )
  • Precision DESAT protection
  • 12 V/ 11 V typical UVLO thresholds

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Tools & Software
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Training

How to choose gate driver for SiC MOSFETs and SiC MOSFET modules

Silicon Carbide MOSFETs bring a lot of opportunities to power electronics. However, how to achieve sufficient system benefits by using Silicon Carbide MOSFETs with suitable gate drivers? This training helps you to learn how to calculate a reference gate resistance value for your Silicon Carbide MOSFET; how to identify suitable gate driving ICs based on peak current and power dissipation requirements; and how to fine-tune the gate resistance value in laboratory environment based on worst case conditions.

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