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RoHS Compliant

CYT2B98CACQ0AZEGST

Data Sheet
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CYT2B98CACQ0AZEGST
CYT2B98CACQ0AZEGST
Data Sheet

Product details

  • 16bit TCPWM (Motor control)
    12
  • 16bit TCPWM
    63
  • 32bit TCPWM
    8
  • ADC Channel
    64
  • ASIL/SIL support
    ASIL-B
  • CAN-FD
    8
  • Classification
    ISO 26262-compliant
  • CXPI
    4
  • Cybersecurity Classification
    ISO 21434-ready
  • Debug Interface
    SWD/JTAG/Trace
  • DMA Channels
    92/44/4
  • eMMC
    0
  • eSHE/HSM
    HSM
  • Ethernet Ports
    0
  • Ethernet speed
    NA
  • External Interrupt channel
    152
  • Flash Security
    Yes
  • Flash
    2112 kByte
  • FlexRayTM
    0
  • Floating Point Unit
    Single precision
  • GPIO
    152
  • I2S
    NA
  • LIN
    12
  • Main Core frequency
    160 MHz
  • Main Core type/Crypto Core type
    ARM_CM4F/CM0+
  • MPU
    Yes
  • Operating temperature range TA
    -40°C to 125°C
  • PPU
    Yes
  • RC-OSC
    Yes
  • RTC channel
    1
  • SCB Blocks
    8
  • Smart IOs
    36
  • SMIF (SPI/HyperBus)
    NA
  • SRAM
    256 kByte
  • Supply Voltage
    2.7 to 5.5
  • Temperature sensor
    Yes
  • Watchdog
    Yes
  • Work Flash
    128 kByte
OPN
Product Status
Infineon Package
Package Name
Packing Size
Packing Type
Moisture Level
Moisture Packing
Lead-free
Halogen Free
RoHS Compliant
Infineon stock last updated:
The CYT2B98CACQ0AZEGST is a TRAVEO T2G automotive microcontroller for body control and safety, featuring dual ARM Cortex-M4F (160 MHz) and Cortex-M0+ cores. It integrates 2112 KB flash, 128 KB work flash, 256 KB SRAM, and 152 GPIOs. Key interfaces include 8 CAN FD, 12 LIN, and 4 CXPI channels. ASIL-B and ISO 26262 compliance, HSM, flash security, and ISO 21434-ready cybersecurity ensure robust protection. Operating from 2.7 to 5.5 V and -40°C to 125°C, it is RoHS compliant.

Features

  • Dual CPU: Cortex-M4F 160 MHz, Cortex-M0+ 100
  • Single-precision FPU and DSP on Cortex-M4F
  • 2112 KB code-flash, 128 KB work-flash, 256 KB
  • Hardware inter-processor communication
  • Three DMA controllers: P-DMA0, P-DMA1, M-DMA0
  • Crypto engine: AES, 3DES, RSA, ECC, SHA,
  • Functional safety: MPU, SMPU, PPU, WDT, MCWDT
  • Low-power modes: Active, Sleep, Deep Sleep,
  • Up to 8 CAN FD channels (up to 8 Mbps), ISO
  • Up to 8 SCB (I2C, SPI, UART), 12 LIN channels
  • 12-bit SAR ADC, 1 Msps, up to 39 channels
  • Debug: SWD/JTAG, on-chip debug, trace support

Benefits

  • Dual CPUs enable real-time and secure tasks
  • FPU/DSP boost math and signal processing
  • Large flash/SRAM support complex applications
  • Hardware IPC ensures fast, safe multitasking
  • DMA controllers speed up data transfers
  • Crypto engine secures data and authentication
  • Safety features protect against faults
  • Low-power modes extend battery/system life
  • CAN FD, SCB, LIN enable flexible connectivity
  • High-speed ADC supports precise measurements
  • On-chip debug simplifies development
  • ISO CAN FD compliance ensures

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

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