CY62187G30-55BAXI
Active and preferred
RoHS Compliant
Lead-free

CY62187G30-55BAXI

Datasheet
package
ea.
in stock

Content could not be loaded

Unfortunately, we were unable to load the content for this section. You may want to refresh the page or try again later.

CY62187G30-55BAXI
CY62187G30-55BAXI
ea.
Datasheet

Product details

  • Alarms
    N
  • Density
    64 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage range
    2.2 V to 3.6 V
  • Operating Voltage (VCCQ) max
    3.6 V
  • Organization (X x Y)
    4Mb x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial
  • Real Time Clock
    N
  • Speed
    55 ns
  • Watchdog Timer
    N
Recommended
OPN
CY62187G30-55BAXI
Product Status active and preferred
Infineon Package
PG-LFBGA-48
Package Name FBGA-48 (001-50044)
Packing Size 210
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-LFBGA-48
Package Name FBGA-48 (001-50044)
Packing Size 210
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
CY62187G30-55BAXI is a 64-Mbit (4M × 16) MoBL SRAM with embedded ECC for single-bit error correction and an ERR pin for error indication. It operates from 2.2 V to 3.6 V over -40 to 85°C and provides 55 ns access. Standby current is 6 µA typical (38 µA max) with automatic power-down, and it supports 1.0 V data retention. The device uses TTL-compatible I/O and comes in a Pb-free 48-ball VFBGA with dual chip enable.

Features

  • 64-Mbit SRAM (4M × 16)
  • Embedded ECC, 1-bit correction
  • ERR pin flags 1-bit error events
  • 2.2 V to 3.6 V VCC operation
  • 55 ns read/write cycle time
  • OE to data valid: 25 ns
  • Standby current 6 µA typ, 38 µA max
  • Automatic power-down via CE/BHE/BLE
  • Byte writes via BLE/BHE enables
  • High-Z outputs when deselected
  • 1.0 V data retention mode
  • TTL-compatible inputs and outputs

Benefits

  • Fits 16-bit memory bus systems
  • ECC improves data integrity
  • ERR simplifies fault monitoring
  • Works with 2.2–3.6 V rails
  • 55 ns supports fast SRAM access
  • 25 ns OE speeds read response
  • µA standby extends battery life
  • Auto power-down cuts idle power
  • Byte writes reduce write bandwidth
  • High-Z eases bus sharing
  • 1.0 V retention saves backup power
  • TTL I/O eases logic interfacing

Applications

Documents

Design resources

Partner solutions

Developer community