Active and preferred
RoHS Compliant
Lead-free

CY14B116N-ZSP25XI

Data Sheet
package
ea.
in stock

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CY14B116N-ZSP25XI
CY14B116N-ZSP25XI
ea.
Data Sheet

Product details

  • Density
    16 MBit
  • Interfaces
    Parallel
  • Lead Ball Finish
    Pure Sn
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) max
    3.6 V
  • Operating Voltage range
    2.7 V to 3.6 V
  • Organization (X x Y)
    1Mb x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2031
  • Qualification
    Industrial
  • Speed
    25 ns
Recommended
OPN
CY14B116N-ZSP25XI
Product Status active and preferred
Infineon Package
PG-TSOP-54
Package Name TSOP-II-54 (51-85160)
Packing Size 216
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-TSOP-54
Package Name TSOP-II-54 (51-85160)
Packing Size 216
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
CY14B116N-ZSP25XI is a 16-Mbit (1024K × 16) parallel nvSRAM combining SRAM with QuantumTrap nonvolatile cells. It operates from 2.7 V to 3.6 V over -40°C to 85°C, with hands-off AutoStore on power-down using a 19.8 µF to 82.0 µF VCAP capacitor and power-up RECALL. STORE/RECALL can be initiated by software or the HSB pin. The device offers 25 ns access in a 54-pin TSOP II package.

Features

  • 16-Mbit nvSRAM, SRAM interface
  • AutoStore on power-down via VCAP
  • STORE via software or HSB pin
  • RECALL via software or power-up
  • QuantumTrap nonvolatile cell tech
  • 1M STORE cycles to QuantumTrap
  • 20-year data retention
  • Infinite SRAM R/W/RECALL cycles
  • Sleep mode current 10 µA max
  • Power-up RECALL duration 30 ms
  • STORE cycle duration 8 ms
  • VCAP capacitor 19.8 µF to 82 µF

Benefits

  • Retains data through power loss
  • No battery needed for retention
  • Flexible save/restore control
  • Fast restart after power returns
  • High endurance for frequent saves
  • No wear-out from SRAM writes
  • Long service life for stored data
  • Sleep cuts idle power drain
  • 10 µA sleep suits low-power systems
  • Predictable shutdown save time
  • Simple hold-up cap eases design
  • Blocks access during STORE/RECALL

Documents

Documents

Design resources

Partner solutions

Developer community

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