Active and preferred
RoHS Compliant
Lead-free

S25FL256SDSBHB210

Data Sheet
package
software

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S25FL256SDSBHB210
S25FL256SDSBHB210
Data Sheet

Product details

  • Classification
    ISO 26262-ready
  • Density
    256 MBit
  • Family
    FL-S
  • Interface Bandwidth
    80 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    133 / 80
  • Interfaces
    Quad SPI
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature
    -40 °C to 105 °C
  • Operating Voltage
    3 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2035
  • Qualification
    Automotive
Recommended
OPN
S25FL256SDSBHB210
Product Status active and preferred
Infineon Package
PG-TFBGA-24
Package Name FBGA-24 (002-15534)
Packing Size 3380
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-TFBGA-24
Package Name FBGA-24 (002-15534)
Packing Size 3380
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S25FL256SDSBHB210 is a 256 Mb automotive-grade SPI NOR flash memory using 65-nm MIRRORBIT™ technology and Eclipse architecture for fast program and erase. It supports Single, Dual, and Quad SPI Multi-I/O, DDR read up to 80 MHz, and operates at 2.7 V to 3.6 V core and 1.65 V to 3.6 V I/O.

Features

  • MIRRORBIT™ technology stores 2 bits per cell
  • Eclipse architecture for fast program/erase
  • SPI Multi-I/O: x1, x2, x4 data width support
  • DDR read commands for higher throughput
  • 256B/512B page programming buffer
  • Hybrid and uniform sector erase options
  • 100,000 program-erase cycles minimum
  • 20-year data retention minimum
  • 1024-byte One-Time Programmable (OTP) area
  • Advanced sector protection (ASP)
  • Core voltage: 2.7 V to 3.6 V, I/O: 1.65 V to
  • Operating temp: –40°C to +125°C

Benefits

  • High density, low-cost storage solution
  • Fast read/write boosts system performance
  • Flexible interface fits many host controllers
  • DDR/QIO enables high-speed data access
  • Large buffer improves programming efficiency
  • Multiple erase options ease migration
  • Reliable for frequent updates and code
  • Long retention ensures data integrity
  • OTP secures device identity and config
  • Sector protection prevents unwanted changes
  • Wide voltage range supports diverse systems
  • Broad temp range fits harsh environments

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

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