Active and preferred
RoHS Compliant
Lead-free

IR2213S

1200 V high- and low-side gate driver IC with shutdown
Multiple OPNs available
ea.

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Product details

  • Channels
    2
  • Configuration
    High-side and low-side
  • Input Vcc
    12 V to 20 V
  • Isolation Type
    Functional levelshift JI (Junction Isolated)
  • Output Current (Source)
    2 A
  • Output Current (Sink)
    2.5 A
  • Qualification
    Industrial
  • Turn Off Propagation Delay
    225 ns
  • Turn On Propagation Delay
    280 ns
  • VBS UVLO (On)
    10.2 V
  • VBS UVLO (Off)
    9.3 V
  • VCC UVLO (On)
    10.2 V
  • VCC UVLO (Off)
    9.3 V
  • Voltage Class
    1200 V
OPN
IR2213STRPBF IR2213SPBF
Product Status active and preferred active and preferred
Infineon Package
Package Name N/A N/A
Packing Size 1000 1980
Packing Type TAPE & REEL TUBE
Moisture Level 3 3
Moisture Packing DRY DRY
Lead-free Yes Yes
Halogen Free No No
RoHS Compliant Yes Yes
Infineon stock last updated:
ea. in stock ea. in stock

Product Status
Active
Infineon Package
Package Name -
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock

Product Status
Active
Infineon Package
Package Name -
Packing Size 1980
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
EiceDRIVER™ 1200 V high- and low-side gate driver IC with typical 2.0 A source and 2.5 A sink currents in DSO-16 lead, wide-body package for IGBT discretes and IGBT modules. IR2213S utilizes proprietary 1200 V HVIC and latch immune CMOS technologies which enable a rugged, monolithic construction with integrated protective features such under voltage lockout protection, shutdown, and separate logic and power ground.

Features

  • Floating channel up to 1200 V
  • Tolerant to neg. transient volt.
  • dV/dt immune
  • Gate drive supply: 12 to 20 V
  • Undervolt. lockout for both channel
  • 3.3 V logic compatible
  • Sep. logic sup. from 3.3 V to 20 V
  • Logic & power ground +/- 5 V offset
  • CMOS Schmitt-triggered inputs
  • C-by-c edge-trigg. shutdown logic
  • Matched prop. delay for both chan.
  • Outputs in phase with inputs

Documents

Design resources

Developer community

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