Active and preferred
RoHS Compliant
Lead-free

CYT2B65CADQ0AZEGST

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CYT2B65CADQ0AZEGST
CYT2B65CADQ0AZEGST

Product details

  • 16bit TCPWM (Motor control)
    4
  • 16bit TCPWM
    46
  • 32bit TCPWM
    2
  • ADC Channel
    32
  • ASIL/SIL support
    ASIL-B
  • CAN-FD
    4
  • Classification
    ISO 26262-compliant
  • CXPI
    0
  • Cybersecurity Classification
    ISO 21434-ready
  • Debug Interface
    SWD/JTAG/Trace
  • DMA Channels
    54/26/2
  • eMMC
    0
  • eSHE/HSM
    HSM
  • Ethernet Ports
    0
  • Ethernet speed
    NA
  • External Interrupt channel
    78
  • Flash Security
    Yes
  • Flash
    576 kByte
  • FlexRayTM
    0
  • Floating Point Unit
    Single precision
  • GPIO
    78
  • I2S
    NA
  • LIN
    5
  • Main Core frequency
    80 MHz
  • Main Core type/Crypto Core type
    ARM_CM4F/CM0+
  • MPU
    Yes
  • Operating temperature range TA
    -40°C to 125°C
  • PPU
    Yes
  • RC-OSC
    Yes
  • RTC channel
    1
  • SCB Blocks
    6
  • Smart IOs
    16
  • SMIF (SPI/HyperBus)
    NA
  • SRAM
    64 kByte
  • Supply Voltage
    2.7 to 5.5
  • Temperature sensor
    Yes
  • Watchdog
    Yes
  • Work Flash
    64 kByte
OPN
CYT2B65CADQ0AZEGST
Product Status active and preferred
Infineon Package
Package Name LQFP-100 (002-11500)
Packing Size 500
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
Package Name LQFP-100 (002-11500)
Packing Size 500
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The CYT2B65CADQ0AZEGST is a TRAVEO T2G CYT2B6 Series automotive microcontroller with an 80 MHz ARM Cortex-M4F core (single-precision FPU) and Cortex-M0+ security core. It features 576 KB flash, 64 KB SRAM, 54/26/2 DMA channels, 78 GPIOs, 4 CAN FD, and 5 LIN 2.0 channels. Supporting ASIL-B, ISO 26262, and ISO 21434-ready cybersecurity, it integrates HSM, advanced watchdog, RTC, 32 ADC channels, and 16 Smart I/Os.

Features

  • 32-bit Arm Cortex-M4F and Cortex-M0+ CPUs
  • Up to 80 MHz CPU frequency
  • Single-precision FPU on Cortex-M4F
  • 576 KB code-flash, 64 KB work-flash
  • 64 KB SRAM with Deep Sleep retention
  • 32 KB ROM for secure boot
  • CAN FD up to 8 Mbps (3 channels)
  • 12-bit SAR ADC, up to 1 Msps
  • Multiple DMA controllers (P-DMA, M-DMA)
  • Cryptography accelerator: AES, SHA, RSA, ECC
  • Wide operating voltage: 2.7 V to 5.5 V
  • Robust flash protection and debug security

Benefits

  • Dual CPUs enable flexible, high-performance
  • 80 MHz supports fast processing and response
  • FPU accelerates math-intensive tasks
  • Large flash/SRAM allow complex firmware
  • Deep Sleep SRAM saves power in standby
  • Secure boot ensures system integrity
  • CAN FD enables fast automotive networking
  • 12-bit ADC provides accurate sensor data
  • DMA reduces CPU load for data transfers
  • Hardware crypto enhances data security
  • Wide voltage range fits diverse applications
  • Security features protect against tampering

Applications

Documents

Design resources

Developer community

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