CY62167ELL-45ZXIT
Active and preferred
RoHS Compliant

CY62167ELL-45ZXIT

Datasheet
package
ea.
in stock

Content could not be loaded

Unfortunately, we were unable to load the content for this section. You may want to refresh the page or try again later.

CY62167ELL-45ZXIT
CY62167ELL-45ZXIT
ea.
Datasheet

Product details

  • Density
    16 MBit
  • Family
    MoBL™ SRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    Ni/Pd/Au
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage range
    4.5 V to 5.5 V
  • Organization (X x Y)
    1M x 16
  • Peak Reflow Temp
    260 °C
  • Qualification
    Industrial
Recommended
OPN
CY62167ELL-45ZXIT
Product Status active and preferred
Infineon Package
PG-TSOP-48
Package Name TSOP-I-48 (51-85183)
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free No
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-TSOP-48
Package Name TSOP-I-48 (51-85183)
Packing Size 1000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
CY62167ELL-45ZXI is a 16-Mbit CMOS SRAM configurable as 1 M × 16 or 2 M × 8, with 45 ns access for processor interfaces with TTL input levels. It operates from 4.5 V to 5.5 V over –40°C to +85°C and uses CE1/CE2, OE, and BLE/BHE controls for memory expansion and byte writes. Automatic power-down reduces standby to 1.5 µA typ (12 µA max); active current is 2.2 mA typ at 1 MHz and 25 mA typ at fMAX.

Features

  • 16-Mbit SRAM, 1 M×16 or 2 M×8
  • 45 ns read/write cycle time
  • 4.5 V to 5.5 V VCC operation
  • 2.2 mA typ at 1 MHz active
  • 1.5 µA typ standby power-down
  • 12 µA max standby current
  • TTL input levels supported
  • CE1/CE2/OE chip control inputs
  • BLE/BHE byte write enables
  • High-Z outputs on disable
  • >2001 V ESD (MIL-STD-883)
  • Latch-up current >200 mA

Benefits

  • Flexible 16-bit or 8-bit bus design
  • 45 ns access boosts CPU throughput
  • 5 V supply fits legacy designs
  • Low active current cuts power draw
  • µA standby extends battery life
  • Low max standby eases power budget
  • Direct TTL interfacing reduces glue
  • CE/OE simplify memory expansion
  • Byte writes reduce write bandwidth
  • High-Z avoids bus contention
  • High ESD cuts handling failures
  • Latch-up immunity improves uptime

Applications

Documents

Design resources

Partner solutions

Developer community