Description of Work

The world is facing an ever-increasing energy demand. In this context, a transition to replacing conventional energy sources with renewable ones causes a strong need for electrification in many sectors. Power2Power is targeting the main ones by developing advanced and cost-competitive silicon-IGBT-based power electronic solutions along the European value chain of power electronics for the sectors industry, mobility and grid.

In the first project year, the 43 partners from eight European countries emphasised the technological launch of the project activities by investigating and setting up specifications and requirements for achieving their respective goals in Power2Power. Further, first results have been obtained.

  • In work package 1, the development of advanced substrate material for 300 mm wafers for power electronics ≥1700 V was started. In addition, innovative integrated gate driver approaches were addressed. The activities led to important results for the way into the pilot lines.
  • In work package 2, the implementation of the advanced IGBT technology flavours in the pan-European pilot lines was initiated. Here, the development activities ranged from manufacturing concepts for higher power density over improved test methodology to process development, i.e. implant filters.
  • In work package 3, close collaborations were actively developing novel materials and respective manufacturing processes in the backend, i.e. for interconnects. In addition, requirements have been defined for sample labs for power packages and IGBT frame-based modules.
  • In work package 4, the automation of frontend wafer fabrication has been targeted, i.e. a first robot unit for advanced teaching methods was set up. For the backend production of power electronics, detailed automation concepts have been described and their application started.
  • In work package 5, the concept and design phase was brought forward and partners from all over Europe developed advanced technological approaches in close collaboration between industry, SME and academia. Together, they are targeting the applications for industry, mobility and grid.
  • In work package 6, partners of all backgrounds gathered to address robustness and reliability of the silicon-IGBT-based power electronics as a key differentiator for future European products. Here, testing concepts and requirements for technologies along the value chain were defined and further developed.

Overall, the various meetings and workshops in Power2Power fostered the partners’ close interaction and seeded the ambitious development in the upcoming project years, aiming at providing Europe and the world markets with the next-generation silicon-IGBT-based power electronics.

In the second project year, the 43 partners from eight European countries emphasized the technological launch of the project activities by implementing the obtained results into solutions to achieve their individual and thereby the overall project goals together.

  • In work package 1, the development of advanced substrate material and technology development for 300 mm wafers for power electronics ≥1700 V was implemented in simulations, models and demonstrators. In the same way, innovative integrated gate driver approaches were addressed. The activities led to important results for the way into the pilot lines.
  • In work package 2, the advanced IGBT technologies in the pan-European pilot lines were started as first trial runs. Here, the development activities ranged from manufacturing concepts for higher power density over improved test methodology to process development, i.e. implant filters.
  • In work package 3, close collaborations were actively developing novel materials and respective manufacturing processes in the backend, i.e. for interconnects. In addition, the sample labs and pilot lines for power packages and IGBT frame-based modules were put into place and initated.
  • In work package 4, the automation of frontend wafer fabrication led to first functional demonstrators, e.g. at the interface between substrate supplier and frontend. For the backend production of power electronics, detailed automation concepts were progressing in their application.
  • In work package 5, the concept and design phase was finished and the partners from all over Europe started building their demonstrators. Together, they are targeting the applications for industry, mobility and grid.
  • In work package 6, partners of all backgrounds gathered to address robustness and reliability of the silicon-IGBT-based power electronics as a key differentiator for future European products. Here, testing methods for technologies along the value chain were fostered by intensified sample and data exchange between the partners.

Overall, the various meetings and workshops in Power2Power fostered the partners’ close interaction for achieving their goals in the final project year. The results will provide Europe and the world markets with the next-generation silicon-IGBT-based power electronics.

Work Packages and Objectives

Lead: IFAG
Participating partners: IFD, IFAG, mi2, TUIL, XFAB-DD, XFAB-EF, IFAT, ETH Zürich

Objective 1.1 New materials and IGBT technology suitable for high-volume production and higher current density

Today, IGBT devices with voltages from 1200V and above are still manufactured in high volume on 200mm substrates. This needs to be changed to hold and reach an even better competitive global position of the European power electronics and semiconductor industry. Also, new high volume application appears on the power electronics market, which request higher breakdown voltage levels (≥1700V) by improved performance (e.g. lower losses; faster switching).

While the performance is driven by cell design and material stacks, the cost per device depends on chip size and wafer diameter as well. On the other hand, the device cost within a power module depends on the current density (current per chip area) and the overall chip area in comparison to the overall ceramic substrate inside the power module. This causes the need to work on new concepts of IGBT devices, which are usable in the wide range of voltage classes to 1700V and beyond. These IGBT devices need to be based on new, more efficient cell designs, which allow increasing the current density with a simultaneous increase of the usable wafer size of an increased silicon substrate diameter up to 300mm and also new material stacks. Developing new IGBT concepts focusing on the production on 300mm silicon wafers with advanced isolation structures and suitable material stacks allowing junction temperatures over lifetime up to 200°C is the core content to WP1.

The sheer volume of the available substrate materials are optimized to the requirements of CMOS technologies and do not necessarily aim for the specific requirements of power semiconductor technologies. Here, WP1 is investigating new process possibilities of the silicon ingots.

For the high-performing IGBTs ≥1700V and further extension of the IGBT family, quality and cost position of the respective 300mm silicon substrates have to be further improved. It is necessary to develop the crystal growing process for a higher resistivity target and to improve the counter-doping approach in order to tighten the resistivity distribution and concentration range of other elements along the crystal.

Objective 1.2 Power driver

Advanced IGBTs and other power devices require appropriate smart, powerful, fast and safe gate driver systems to utilize their full potential. In order to minimize energy losses during the permanent switching of the power devices, the gate drivers need to be fast, i. e. show low propagation delay in the signal path. This will be achieved by a high-level integration that combines controller and driver circuits in a single package. At the same time, a high level of galvanic isolation needs to be ensured by an integrated isolation barrier. For this purpose, an open-source process technology will be developed and applied in a new smart driver system.

The successful process integration will be demonstrated by high voltage breakdown measurements of special isolation test structures and parameter measurements of the CMOS primitive devices in a test chip manufactured in silicon.

The access to the process will be enabled by a functional PDK including the technology library, primitive devices, automated design rule and layout vs schematic checks. The successful development of the PDK will be demonstrated by the description of the functionalities in a report. The new process technology will be used to create demonstrator circuits in form of functional isolated gate driver systems in package.

Objective 1.3 Novel monolithic gate driver concepts for future requirements in automotive segments

To get most performance out of the device, it is necessary to control it in a safe and reliable way. The increased temperatures close to the power devices by the increased junction temperatures up to 200°C together with the need for more compact designs of the power stages cause the need of better isolation and higher temperature capabilities for the galvanic isolation stage and also for the whole driver devices.

In this work package, innovative gate driver concepts, technologies and materials need to be investigated to be prepared for requirements of the future. Focus is on stand-alone gate drivers in a monolithic approach to overcome drawbacks of multichip gate driver concepts in dedicated package technologies. Proper choice of materials (e.g. dielectrics) that closely link chip and package will be investigated and evaluated.

Lead: IFD
Participating partners: IFD, IFAG, mi2, TUIL, IFAT, MCL

Objective 2.1: Establishing new semiconductor technologies & processes

IFD will set up a pilot line production enabling future large volume production of IGBT chips in high voltage applications with different technology flavours in order to serve different markets. Goal is to adapt the new IGBT technology generation MPT (micro patterned trench) to high voltage market needs and make is suitable for special customer needs and applications. Considering the high voltages and high device temperatures during operation, providing sufficient robustness margin (defined in WP1) drive new setup and optimization of several processes and adaption of semiconductor technology in a 300mm pilot line. Primary target is to speed up time to stable manufacturing thus achieving shorter time to market (10% improved cycle time compared to current main production; stable processes with cpk>1.5).

The following approaches have to be evaluated in Power2Power:

  • Implement stable process with regards to time, quality, performance equivalent or better to running products
  • Design, install and test a pilot production ready ion implant endstation
  • Process, device & yield optimization with focus on metallization concepts and new wafer raw material
  • Extension of advanced high-power IGB technologies and derivatives
  • Enhancement of IGBT technologies for high-voltage applications

Objective 2.2: New methodologies & processes for competitive pilot lines

To speed up the setup and qualification of the pilot lines selected measures will be taken. These include logistics topics like knowledge-based process and equipment setup, advanced material flow concepts as well as advanced metrology (see task 2.2.1) and advance safety and security measures. Furthermore, critical throughput work centers, e.g. the furnace group are analyzed. These improvements all together have to result in a comparable utilization and performance of the pilot lines.

As the thin wafer processes are essential for the next generations of IGBTs, all related topics are relevant for the successful process implementation. Therefore, topics as optimized wafer thickness variation, thin wafer cleaning, thin wafer metallization, ion implantation and electrical characterization of thin wafers are major blocks in this work package. It is complemented by the necessary sawing methods, either mechanical or laser-based.

Lead: IFAG
Participating partners: FHG, HSZG, IFAG, SGS, TUC, UPB, UROS, SAL, MCL, IFCE, APC, BTE, TUD

Objective 3.1: Enhanced packaging materials and technologies for higher temperature, higher power density and improved robustness

In this work package, the target is to increase

  • the maximum operation junction temperature (Tjmax) in overload situation to 200°C with peak package temperatures
  • which are even higher
  • the package isolation robustness,
  • the power density

State-of-the-art are materials and technologies in high power packages and frame-based modules limit reliability and durability thus not fulfilling upcoming customers' application requirements:

  • The melting temperature (Tm) of the solder alloy is close the junction temperature (Tjmax) of the semiconductor.
  • The temperature of the bond wire can increase to ≥250°C for a longer time assuming a maximum junction temperature of 200°C for the power chips in overload situation.
  • Potting materials for isolation have defects and impurities leading to decrease of isolation robustness
  • Molding process introduces air filled voids and gaps which can act as seam cell for discharges
  • Encapsulation material with isolation purposes at operating temperatures ≥ 200°C are not available
  • Corrosive gases cause dendrites under harsh conditions in today’s packages based on silicone gel potting amplified by the combination of humidity, corrosive gases and high electric fields

Objective 3.2 Fast & flexible sample lab for innovative high power packages/modules

Target of this work is on integration of the materials and processes into an agile and flexible lab fabrication of assembly and packaging for isolated packages and power modules. Two different lab fabrication capabilities will be set up in this task to allow agile and flexible supply of first assembled samples to customers: lab fabrication of HV isolated packages and innovative high power modules. These lab fabrication capabilities will include all major material choices and assembly and package processes. These will be a major step for preparing future full pilot and production lines.

Objective 3.3 High performance package and module pilot lines

Target of this work is on the integration of materials and processes in two new concepts of high performance pilot lines for IGBT packages and modules. The first pilot line will push packaging of > 700V up to 1200 Volts. The second pilot line focuses on frame based power modules. The two pilot lines are able not only to provide prototypes to customers but also small volume production. These pilot lines allowing higher volume will be starting based on the lab and prototype production of objective 3.2. Basic investigation on the automation and implementation of the new or changed process are achieved by the different partners in the work package and interaction with WP4.

At the end of the project, new capability for agile and flexible prototyping based on lab lines as well as pilot lines with the new materials and processes will be available.

Lead: HSZG
Participating partners: IFD, HESSE, HSZG, IFAG, SIL, TUDD, IFAT,  IFCE

Objective 4.1: Automation at the interface between first tier supplier and front end

Within objective 4.1 an integration and automation of the logistics processes between different fabrication facilities, in this case a first tier supplier of wafers and its fronted customer is targeted. The main aim is to reduce the costs and to enhance the speed of bagging and de-bagging procedures when material is transferred from one facility to another. The results can also be transferred to other cross-factory material flows. Moreover, a general and continuously task within automated factories is to calibrate robots. The aim is to automate robot calibration tasks thereby reducing the manual engineering efforts in connection with the redesign of line layouts or the integration of new tools. A manual calibration of robots is error-prone and time-consuming, resulting in negative effects on the utilization of production equipment. A universally applicable system for automated calibration of robots can help to reduce maintenance efforts and enables better utilization of production equipment.

Objective 4.2: Demonstrating Industry 4.0 in assembly and package pilot lines

To stay competitive in the face of increasing market requirements Backend Facilities need to constantly adapt their production systems. This results in the fact that these factories have complex material and information flows, e.g. between different factory buildings or different floors. The main aim is to optimize those flows, e.g. by means of digitization, automation and via the approach of value stream design in order to enhance the adaptability of those systems, to reach low manufacturing cost, and to reduce cycle times. Existing factories are often configured with relatively static system elements. In addition, optimization approaches have also mostly a static character, e.g. value stream design. Dynamically changing factors, which have huge impacts on the factory performance, receive little consideration. The faster the product life cycles change in the future, the faster their value streams will change. The goal is to develop continuous planning approaches by using real time data and to focus on variability management. The aim is to design adaptable production and logistics processes and systems. This could be done for example by modularizing needed service functions in the factory.

Objective 4.3: Integrated logistics for complete value chains

In order to achieve the goal of an efficient ECS value chain, it is very important to design end-to-end, cross-company, controlled processes. The main objective is to increase the degree of integration of cross-company value-added processes in order to increase the quality of products and to reduce manufacturing and assembly as well as capital commitment costs and to increase the speed and predictability of logistics processes. In doing so, the partners are concentrating on the integration of the two interface types between frontend and backend facilities and semiconductor manufacturers and the ultimate customers. Interface integrated logistics processes and information systems for data exchange between Front End and Backend and between a semiconductor supplier and its customers will be developed. Hereby, new data and hardware automation concepts for measurement, preassembly, shipment and backend processes are targeted.

Lead: IPT

Participating partners: AVL SFR, EAAT, TUDD, VIF, BRUSA, ETHZ, CSIC, FAGOR, IPT, TST, UNIOVI, UPM, ABB, KEMPPI, POWERNET, ALFEN, TUD

Objective 5.1 Mobility

The future of European mobility is directly related to a more and more efficient and wider offer public transport for more and more crowded cities where low-emission smart and lightweight electrical vehicles will be also necessary. Altogether, they will permit to face the coming challenges, strengthening not just the mobility itself but also the European strategic related to climatic aspects, higher added value companies and employees and worldwide leadership.

For that reason, the specific objectives are mainly established related to Railway and Electrical vehicles and more specifically to the corresponding Drive train and Battery charger applications. Both aspects considered key aspects in each field.

Objective 5.2 Industry

In order to understand the future of the industry a step back is necessary. The industrial sector (Motion inverters and welding) is one of the most important one regarding to high power modules market share consumption which past and present evolution is strongly linked to cost reduction, power density and reliability improvements. All these aspects are related to new Silicon devices usage at higher operating conditions which requires new design concepts and components and new silicon based more optimal topologies. Additionally, other aspects for more effective configurability and design process related to a wider product portfolio but easier to produce will be established.

Objective 5.3 Grid

The existence of more and more electrical vehicles and need of improving energy efficiency is totally linked to grid aspects, where an optimal usage of it is mandatory and all the existing opportunities linked to different applications requirements have to be considered. For that reason, a third objective related to grid aspects have been established where Vehicle2Grid application (mostly related to grid aspects) new Energy generation in railway substations dc Energy generation PEBB systems and Energy storage are addressed.

Lead: FHG

Participating partners: AVL SFR, FHG, IFAG, SGS, TUC, TUIL, UBremen, XFAB-DD, XFAB-EF, VIF, MCL, BRUSA, CSIC, FAGOR, TST, UPM, AALTO, ABB, KEMPPI, POWERNET, PTEC, STUBA, IWO, JIACO, TUD

Objective 6.1: Reliability and Robustness Requirements

The vision of Power2Power can only made coming true, i.e., Europe can become the number one in power electronics, if the technological progress attempted by WP1-5 is supplemented by meeting all quality, reliability and robustness requirements in accordance to the specific needs of the next generation of electronic systems in the application fields mobility, production, and energy. Reliability means the ability of a system or component to function as specified under the stated conditions for a predefined period of time, which is from 15 years (in automotive) or 20 years (photovoltaics)

up to 40 years (energy conversion, high voltage DC transmission). Robustness means the ability of surviving occasional loading situations in excess to the specified range of use conditions (like over-voltage, short circuit, or over heating for short periods) without permanent damage. Considering the high voltages (up to 2 kV) and high temperatures (up to 200°C) foreseen during operation, providing sufficient robustness margin constitutes a particular challenge. In general, the reliability and robustness requirements are clearly higher for the new power devices than for the microelectronic

devices. Objective 6.1 aims at enabling new high-volume power device products and their fabrication, testing, and qualification procedures. O6.1 shall contribute to the development of optimum standards for the reliability tests and assessments. Today, sets of standard methods exist for the established power electronics technology and need to be obeyed in future as well. However, they do not suffice for the products of next generation. The new component and module architectures, the ongoing miniaturization, the direct combination of power electronics and information electronics (i.e., kV power pulses with steep dV/dt next to micro…millivolt signals in kHz..GHz range) as well as the specific requirements from the new application fields in automotive and industrial electronics (e.g., autonomous e-cars) necessitate a major update and some upgrades of the reliability and robustness requirements. The tasks assigned to O6.1 will provide them.

Objective 6.2: New test and assessment methods for validating reliability and robustness

The new applications in automotive and industrial electronics cause a growing diversity in the power electronics systems with respect to device configuration, materials, and other design factors at component and package levels. The new HP/HV systems will be operated under more harsh and safety relevant conditions than usual. In addition, a steeply increasing share of the new products will go (e.g., as part of the e-car) to individual people, who are very cost sensitive. This situation of high innovation rate, high level of requirements, and high cost pressure results in challenges for the industrial testing processes, which need to cover both, reliability and robustness. Based on the current methods, the proof of compliance to all requirements would take too long. Yet, it would often not cover the application conditions adequately. Up to now, there is lack of knowledge in physics of failures and in physics of ageing mechanisms. Hence, objective 6.2 is aiming at developing reliability and robustness test strategies and assessment methods with improved failure mode coverage for the new devices and systems in their various application conditions. At the same time, the methods shall keep time and effort for testing and qualification of the future power electronics technologies and products in reasonable bounds despite of all the challenging factors. The investigations will follow a complementary approach to cover both sides systematically:

  1. Separation of the multiple failure modes that occur intermixed in service life. This allows identifying effective measures for failure avoidance.
  2. Determination and consideration of the failure mode interactions. This shall allow finding the globally best design.

New tests procedures for lifetime and robustness assessments will be deduced from the root cause investigations.

Objective 6.3: Lifetime Estimation

Based on the experimental tests and assessments (O6.2), objective 6.3 is dedicated to development and validation of new approaches, in which thoroughly verified virtual schemes are enabled to substitute long-lasting experimental lifetime tests during the design phase. Lifetime models based on 'physics of failure' approaches will be derived for that virtual reliability assessment. Applying them, the tasks assigned to O6.3 will add the methods of virtual prototyping to the physical test and assessment methods. They will be demonstrated in relevant industrial environment (TRL6). Optimally, the newly developed components shall pass the reliability tests right with the first physical samples fabricated.

Objective 6.4: Robustness improvements

Based on operational prototypes of the new power electronic systems, the validity, applicability, and efficiency of new methods for testing and assessing the robustness will be developed and demonstrated under operational environments, i.e., within the setting of the pilot lines. Robustness of a device, module, or system is understood as its capability to withstand occasional loads outside its specified service operation area without damage or destruction. Therefore, the tasks assigned to O6.4 are dedicated to the robustness of the new power electronics solutions at device and wafer levels as well as at component and package levels for both, power and driver stages, respectively. They will include the development of suited overload test methods. A new requirement is surge current capability of IGBTs to protect the load (motor, generator) from uncontrolled torques in case of converter failures. This can be achieved by raising the gate voltage up to 35-50 V (instead of 15V) for a short time. Accordingly, gate oxide stability needs to be ensured.