Conference Agenda

8:00 - 9:00 AM

Registration

 

9:00 - 9:15 AM

Welcome Address

 

9:15 - 10:00 AM

Topic: Multicore on Wheels

Speaker: Craig Stephens - Chief Engineer Controls, Ford Motor Company

Description: A Discussion of the complexities of the microcontroller based systems within the automotive systems and the associated performance drivers.  This sets the stage for a discussion of the need for a more flexible, efficient, and powerful Multicore platform of the future.

 

10:00 - 10:45 AM

Topic: Embedded Software: Challenges in Future Automobile

Speaker: Dona Burkard - Advanced Embedded Systems, Ford Motor Company

Description: A discussion of the present state of software architecture and development within Automotive Powertrain, the present challenges of today, and the future challenges and opportunities to come.  

 

10:45- 11:15 AM

Break

 

11:15 - 12:00 PM

Topic: Current state of the AUTOSAR partnership and overview of AUTOSAR support for multicore

Speaker: John Gonzaga - GM / Autosar Org

Description: A discussion of how AUTOSAR is affected by and enables Multicore with a focus on near future evolutions.

 

12:00 - 12:45 PM

Topic: Multicore in Automotive Powertrain and Next Steps Towards Parallelization

Speaker: Ralph Mader - Principal Technical Expert, Continental

Description: This will present experiences gained in the automotive industry regarding the introduction of multicore-based platforms in control units for combustion engines. The main goal thereby is to optimally utilize the features of the multicore platform for the application. It will discuss methods and tools that enable a systematic approach for further development of the application. The second part of the talk presents an outlook on future parallelization strategies. This includes appropriate design patterns, scheduling, algorithms, and tool support.

 

12:45 - 2:00 PM

Lunch

 

2:00 - 3:00 PM (Live Demo)

Topic: Timing and timing requirements in automotive systems

Speaker: Peter Gliwa - GLIWA

Description:

• AUTOSAR & timing basics
• Why timing analysis?
• Tracing: tool demo
• Multi-core aspects
• Timing requirements today and tomorrow
• Stack analysis

 

3:00 – 3:15 PM

Break

 

3:15 - 4:15 PM (Live Demo)

Topic: Multicore Software Design and Verification

Speaker: Andreas Wagner - Timing Architects

 

4:15 - 4:45 PM

Break

 

4:45 - 5:45 PM (Live Demo)

Topic: Multicore Operating System Handling

Speaker: Joachim Kalmbach - Vector CANtech

 

5:45 - 6:00 PM

Summary

 

6:00 – 8:00 PM

Networking Event

8:00 - 8:30 AM

Reception

 

8:30 – 9:15 AM

Topic: Methods for Migrating Automotive Control Applications to Multicore ECUs

Speaker: Dr. Sebastian Kehr - Senior Engineer, DENSO INTERNATIONAL EUROPE

Description: Embedded multicore processors are an attractive alternative to sophisticated single-core processors for the use in automobile electronic control units (ECUs), due to their expected higher performance and energy efficiency. Parallelization approaches for AUTOSAR legacy software exploit these benefits. Nevertheless, these approaches focus on extracting performance neglecting the system’s worst-case sensor/actuator latency and energy consumption.

This paper presents Parcus; an energy- and latency-aware parallelization technique that combines both runnable- and task-level parallelism. Parcus explicitly models the traversal of data from sensor to actuator through task instances, enabling to consider the latency imposed by parallelization techniques. The parallel schedule quality (PSQ) metric quantifies the success of the parallelization, for which it takes the latency and the processor frequency into account.

We demonstrate the applicability of Parcus with an automotive case study. The results show that Parcus can fully utilize the processor’s energy-saving potential.

 

9:15 - 10:00 AM

Topic: Broad Technical Challenges and Solutions in using Multicore efficiently for Safety-Critical Embedded Control Systems

Speaker: Tom Furhman and Shige Wang – GM Research

Description: This presentation will cover: Task/thread scheduling and synchronization, partitioning and allocation, memory and timing protection, Cache / Memory management, data consistency and synchronization, redundant calculations, and thermal management

 

10:00 - 10:45 AM

Topic: Software Design Automation for the Multicore Era

Speaker: Maximilian Odendahl – Silexica

Description: This presentation will cover: Automatic Parallelization of legacy code, Automatic SW Distribution and Scheduling, and Automatic Code Generation

 

10:45- 11:15 AM

Break

 

11:15 - 12:00 PM

Topic: AUTOSAR compatible Hypervisors for supporting cross company workflows and enhanced safety and security requirements

Speaker: Oliver Korasiak - ETAS

Description: Although AUTOSAR already supports partitioning concepts in the software architecture, these have their limits in terms of functional safety, security as well as IP protection. The technical requirements on new systems such as domain controllers as well as increasingly complex collaboration models are leading to an examination of how partitioning concepts can be extended to support future requirements. This presentation describes the application of hypervisors as an extension of the AUTOSAR methodology.  Various use cases are discussed including the optimization of cross organizational and cross company workflows, IP protection, partial updates and improved safety and security. A hypervisor technology is presented that can be applied to deeply embedded microcontrollers as are typically used in real-time automotive control systems. It is discussed how this approach can be used to fill a gap between the current generation of hypervisors  and the requirements of real-time control systems and how the technology can be integrated into the AUTOSAR architecture and methodology. The presentation will also discuss how the hypervisor approach can be used to support future AUTOSAR concepts and the adaptive platform approach by integrating instances of POSIX and AUTOSAR based operating systems on one device.

 

12:00 - 12:45 PM

Topic: Strategy for Multicore Timing Analysis

Speaker: Matthew Hudghton - Senior Field Application Engineer, Rapita Systems

Description: Timing Issues of using multicores in critical embedded systems: the good, the bad and the ugly

A methodology for multicore timing analysis

Experimental results

Case studies

 

12:45 - 2:00 PM

Lunch

 

2:00 - 3:00 PM (Live Demo)

Topic: Freedom in Heterogeneous Memory Partitioning

Speaker: Roman Knizekl - Hightec

 

3:00 – 3:15 PM

Break

 

3:15 - 4:15 PM (Live Demo)

Topic: Multicore Debugging, Test and System Analysis with UDE

Speaker: Jens Braunes – PLS Development Tools

 

4:15 - 4:30 PM

Break

 

4:30 - 5:30 PM (Live Demo)

Topic: Multicore Solution for ADAS Application

Speaker: John Wojtkowicz – Neutronics

 

5:30 PM

Summary

8:00 – 8:30 AM

Reception

 

8:30 - 9:15 AM

Topic: Efficient Communication and Synchronization in Multicore Systems

Speaker: Dheeraj Sharma - Elektrobit

Description:

• Multi-core and AUTOSAR
• The real cost of synchronization
• Establishing concurrency

 

9:15 - 10:00 AM

Topic: Multicore Platforms in Modern Military Applications

Speaker: John E. Sterns - Field Applications Engineer, Aitech

Description: A view of the Multicore situation as seen from an adjacent industry:

1) If the auto industry was like the defense industry, you’d be driving a 1984 Oldsmobile (with the latest electronics available)

2) The size of LRU (Line Replaceable Units) on helicopter and tank platforms becomes problematic as more “stovepipe” applications are added

3) Combining apps and services onto common platforms is the growing trend (FACE, VICTORY, and virtualization)

4) True hardware concurrency creates problems for legacy real-time software; Vendor tools help but apps will break with multi-core.

 

10:00 - 10:45 AM

Topic: Development of a Fork-Join Dynamic Scheduling Middle-Layer for Automotive Powertrain Control Software

Speaker: Osamah A. Rawashdeh, Associate Professor, Ph.D., P.E., and Waseem Sadeh, Doctoral Candidate – Oakland University

Description:

• We have adopted the Cilk approach (MIT 1994) to develop a pure ANSI C Fork-Join dynamic scheduling runtime middle-layer with a “work-stealing” scheduler targeted for automotive multicore embedded systems.

• The Fork-Join runtime layer is independent from any C compiler and real time operating systems. It could be running on top of any AUTOSAR compliant multicore RTOS, scales well to the available cores, and it abstracts away the details involved in load balancing and inter-core communications from programmers.

• The runtime layer has been have successfully tested and integrated into parts of legacy Ford powertrain software at Ford Motor Company using the 3-core AURIX multicore chip from Infineon and the ETAS’s multicore RTA-OS

• This work outlines our preliminary design and results of evaluating the dynamic scheduler approach for powertrain control software on multicore chips. This work is ongoing research and it presents some future challenges such as meeting deadlines, reliability, and safety that arise when adopting dynamic scheduling for such time and safety-critical software.

 

10:45- 11:15 AM

Break

 

11:15 - 12:00 PM

Topic: Automotive Microcontrollers – its not just all about safety and security

Speaker: Glenn Farrall – Senior Principal CPU Architecture and System Design, Infineon

Jens Harnisch - Senior Staff Expert for Multicore Architecture, Infineon

Description: The first part of the presentation is about the recent media focus on the hacking of cars and the relentless march to higher levels of autonomy and hence safety might lead one to believe these are the only challenges for automotive microcontrollers. In fact the challenge is in supporting these requirements alongside increasing performance and market flexibility while reducing power and cost at the same time. This talk will look at the challenges, tradeoffs and some of the solutions available to the microcontroller designer. The second part focuses on how to use the AURIX microcontrollers efficiently, for example with regards to memory allocation, methods for communication and data exchange.”

 

12:00 – 1:15 PM

Lunch

 

1:15 - 2:15 PM (Live Demo)

Topic: Debugging and Tracing of Multicore Applications with Lauterbach TRACE32 Debugger

Speaker: Udo Zoettler – Lauterbach

 

2:15 – 2:30 PM

Break

 

2:30 - 3:30 PM (Live Demo)

Topic: Multi-Core Tuning Crash Course

Speaker: Franz Maidl and Igor Knyazhitsky – Tasking

 

3:30 - 3:45 PM

Break

 

3:45 - 4:45 PM (Live Demo)

Topic: Advanced AUTOSAR Profiling and Run-Time Optimization incorporating Operating System, RTE and Network Communication

Speaker: Chris Schlink - iSYSTEM

 

4:45 – 5:00 PM

Closing Remarks