EZ-PD™ CCG3 USB type-C port controller PD

EZ-PD™ CCG3 is a highly integrated USB-C PD port controller compliant with USB Type-C and USB PD standards.

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Overview

Infineon's EZ-PD™ CCG3 is a USB Type-C controller with Power Delivery (PD) which provides a complete solution for power banks, adapters, USB dongles, Thunderbolt accessories, monitors, docks, and notebooks. It is a highly integrated solution that includes a Billboard controller, crypto engine, OVP and OCP, dual 64 KB flash memory, and a 2:2 crossbar switch on a single chip. EZ-PD™ CCG3 is compliant with PD 3.0 and supports UFP, DFP, and DRP.

Key Features

  • 48-MHz Arm® Cortex®-M0 processor
  • Dual 64 KB flash (128 KB in total)
  • Integrated USB-PD BMC transceiver
  • Supports one USB Type-C port
  • Configurable resistors (Ra, Rp, Rd)
  • USB PD 3.0 support
  • Integrated digital blocks
  • Integrated analog blocks
  • Dead battery detection support
  • HW crypto block for authentication
  • Full-speed USB device controller
  • Four configurable serial blocks

Products

About

EZ-PD™ CCG3 MCU subsystem

EZ-PD™ CCG3 comes with a 32-bit Arm® Cortex®-M0 CPU optimized for low-power operation with extensive clock gating. It includes a Nested Vectored Interrupt Controller (NVIC) with 32 interrupt inputs and a Wakeup Interrupt Controller (WIC) which allows power to be switched off to the main processor when the chip is in the deep sleep mode. The CPU provides a Non-Maskable Interrupt (NMI) input, which is made available when it is not in use for system functions requested by the user. The device also has a flash module with two banks of 64 KB flash, a flash accelerator, and a supervisory ROM that contains boot and configuration routines.

EZ-PD™ CCG3 USB PD subsystem

EZ-PD™ CCG3's USB PD subsystem includes all the blocks related to USB Type-C and PD. It interfaces with the pins of a USB Type-C connector. It includes a USB Type-C baseband transceiver and physical layer logic. This transceiver performs the BMC and 4b/5b encoding and decoding functions as well as integrating the 1.2 V analog front end (AFE). This subsystem integrates the required terminations to identify the role of the device, including Rp and Rd for UFP/DFP roles and Ra for EMCA/VCONN-powered accessories. The integrated HPD processor can be used to control or monitor the HPD signal of a DisplayPort source or sink. 

The OV/UV block of the EZ-PD™ CCG3 device monitors the VBUS_C supply for programmable overvoltage and undervoltage conditions. The OV/UV and the CSA blocks can generate interrupts to automatically turn off the power FETs for the programmed overvoltage and overcurrent conditions. The USB-PD subsystem also contains two 8-bit Successive Approximation Register (SAR) ADCs for analog to digital conversions.

Why chose EZ-PD™ CCG3

EZ-PD™ CCG3 is a highly integrated solution including a Billboard controller, a crypto engine, OVP, OCP, dual 64 KB flash memory, and 2:2 crossbar switch on a single-chip solution. This results in a significant BOM and board area saving. The availability of various reference designs and support material contribute to speed up the design cycle, reducing the time to market of the final product. The device comes with a graphical user interface, EZ-PD™ Configuration Utility, which allows the selection and configuration of the parameters and the programming of the resulting configuration into the target EZ-PD™ CCG3 device.

EZ-PD™ CCG3 MCU subsystem

EZ-PD™ CCG3 comes with a 32-bit Arm® Cortex®-M0 CPU optimized for low-power operation with extensive clock gating. It includes a Nested Vectored Interrupt Controller (NVIC) with 32 interrupt inputs and a Wakeup Interrupt Controller (WIC) which allows power to be switched off to the main processor when the chip is in the deep sleep mode. The CPU provides a Non-Maskable Interrupt (NMI) input, which is made available when it is not in use for system functions requested by the user. The device also has a flash module with two banks of 64 KB flash, a flash accelerator, and a supervisory ROM that contains boot and configuration routines.

EZ-PD™ CCG3 USB PD subsystem

EZ-PD™ CCG3's USB PD subsystem includes all the blocks related to USB Type-C and PD. It interfaces with the pins of a USB Type-C connector. It includes a USB Type-C baseband transceiver and physical layer logic. This transceiver performs the BMC and 4b/5b encoding and decoding functions as well as integrating the 1.2 V analog front end (AFE). This subsystem integrates the required terminations to identify the role of the device, including Rp and Rd for UFP/DFP roles and Ra for EMCA/VCONN-powered accessories. The integrated HPD processor can be used to control or monitor the HPD signal of a DisplayPort source or sink. 

The OV/UV block of the EZ-PD™ CCG3 device monitors the VBUS_C supply for programmable overvoltage and undervoltage conditions. The OV/UV and the CSA blocks can generate interrupts to automatically turn off the power FETs for the programmed overvoltage and overcurrent conditions. The USB-PD subsystem also contains two 8-bit Successive Approximation Register (SAR) ADCs for analog to digital conversions.

Why chose EZ-PD™ CCG3

EZ-PD™ CCG3 is a highly integrated solution including a Billboard controller, a crypto engine, OVP, OCP, dual 64 KB flash memory, and 2:2 crossbar switch on a single-chip solution. This results in a significant BOM and board area saving. The availability of various reference designs and support material contribute to speed up the design cycle, reducing the time to market of the final product. The device comes with a graphical user interface, EZ-PD™ Configuration Utility, which allows the selection and configuration of the parameters and the programming of the resulting configuration into the target EZ-PD™ CCG3 device.

Documents

Documents

Design resources

Developer community

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