OptiMOS™ PD

OptiMOS™ Power Delivery (PD) – low-voltage power MOSFETs address the need for charger and adapter designs

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Overview

OptiMOS™ PD low-voltage power MOSFET portfolio represents the best fit for USB Power Delivery (PD) and fast charger designs, supporting short lead times on selected devices and fast quote response times. OptiMOS™ PD power MOSFETs in PQFN 3.3x3.3 and SuperSO8 packages are optimized for synchronous rectification in charger and adapter SMPS applications. The small package sizes translate into shrinking form factors.

Key Features

  • Logic level availability
  • Low on-state resistance RDS(on)
  • Low Qg, Qoss, and Qrr
  • Excellent thermal behavior
  • Two standard packages

Products

About

OptiMOS™ PD family features power MOSFETs that offer low on-state resistance (RDS(on)), less switching losses as well as low gate, output, and reverse recovery charges which translates into high efficiency and high power density designs. 

The reduction in overall losses also translates to an excellent price and performance ratio leading to a decrease in total system BOM cost. OptiMOS™ PD achieves lower temperature in a PQFN 3.3x3.3 compared to the next best alternative in SuperSO8 5x6 package.

Logic-level capability enables parts to fully drive from 4.5 V or directly from microcontrollers resulting in a lower part count in the application. The portfolio ranges from 60-100 V MOSFETs, an optimal choice to function as synchronous rectification FETs in charger and adapter designs.

OptiMOS™ PD is available in two small standard packages: 

  • PQFN 3.3x3.3 
  • SuperSO8

Infineon has released a tailor-made OptiMOS™ PD series for synchronous rectification and loading switching of USB-PD chargers. The family features MOSFETs offering low on state resistance (RDS(on)), lower switching losses, as well as low gate-, output- and reverse recovery charges. This reduction in overall losses results in an excellent price/performance ratio, which reduces the overall system BOM cost.

The availability of logic-level variants allows these parts to be fully driven from 4.5 V or directly from microcontrollers, thereby reducing the part count in the application. In addition, the PQFN 3.3x3.3 and SuperSO8 packages can shrink the size of USB-PD chargers. The small package sizes translate into a shrinking form factor enabling DOELV6 efficiency regulation and securing high-power density designs.

OptiMOS™ PD family features power MOSFETs that offer low on-state resistance (RDS(on)), less switching losses as well as low gate, output, and reverse recovery charges which translates into high efficiency and high power density designs. 

The reduction in overall losses also translates to an excellent price and performance ratio leading to a decrease in total system BOM cost. OptiMOS™ PD achieves lower temperature in a PQFN 3.3x3.3 compared to the next best alternative in SuperSO8 5x6 package.

Logic-level capability enables parts to fully drive from 4.5 V or directly from microcontrollers resulting in a lower part count in the application. The portfolio ranges from 60-100 V MOSFETs, an optimal choice to function as synchronous rectification FETs in charger and adapter designs.

OptiMOS™ PD is available in two small standard packages: 

  • PQFN 3.3x3.3 
  • SuperSO8

Infineon has released a tailor-made OptiMOS™ PD series for synchronous rectification and loading switching of USB-PD chargers. The family features MOSFETs offering low on state resistance (RDS(on)), lower switching losses, as well as low gate-, output- and reverse recovery charges. This reduction in overall losses results in an excellent price/performance ratio, which reduces the overall system BOM cost.

The availability of logic-level variants allows these parts to be fully driven from 4.5 V or directly from microcontrollers, thereby reducing the part count in the application. In addition, the PQFN 3.3x3.3 and SuperSO8 packages can shrink the size of USB-PD chargers. The small package sizes translate into a shrinking form factor enabling DOELV6 efficiency regulation and securing high-power density designs.

Documents

Design resources

Developer community

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