Active and preferred
RoHS Compliant
Lead-free

S70GL02GS12FHIV13

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S70GL02GS12FHIV13
S70GL02GS12FHIV13

Product details

  • Density
    2 GBit
  • Family
    GL-S
  • Initial Access Time
    120 ns
  • Interface Frequency (SDR/DDR) (MHz)
    NA
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature
    -40 °C to 85 °C
  • Operating Voltage
    3 V
  • Page Access Time
    20 ns
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2035
  • Qualification
    Industrial
OPN
S70GL02GS12FHIV13
Product Status active and preferred
Infineon Package
Package Name FBGA-64 (002-13243)
Packing Size 1600
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
Package Name FBGA-64 (002-13243)
Packing Size 1600
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S70GL02GS12FHIV13 is a 2 Gbit (256 MB) parallel NOR flash memory based on Infineon's MIRRORBIT™ technology and 65 nm process for high density and reliability. Operating from 2.7 V to 3.6 V with Versatile I/O™ (1.65 V to VCC), it delivers 110 ns random and 25 ns page access times.

Features

  • 65-nm MIRRORBIT™ process technology
  • Parallel 3.0 V operation
  • Versatile I/O voltage: 1.65 V to VCC
  • 16-bit data bus
  • 16-word/32-byte page read buffer
  • 512-byte programming buffer
  • Uniform 128-KB sectors
  • Suspend/Resume for program/erase
  • Advanced sector protection (ASP)
  • 1024-byte OTP array with lockable regions
  • WP# input for sector protection
  • 25 ns page access, 110 ns random access

Benefits

  • High density enables large code/data storage
  • Fast access improves system performance
  • Flexible I/O voltage eases system integration
  • Large buffers speed up read/write operations
  • Uniform sectors simplify memory management
  • Suspend/Resume boosts multitasking
  • Robust protection secures critical data
  • OTP array supports secure storage
  • WP# input prevents accidental overwrite
  • Low standby current saves power
  • High endurance reduces maintenance
  • Long retention ensures data reliability

Applications

Documents

Design resources

Developer community

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