Active and preferred
RoHS Compliant
Lead-free

S70FL01GSDSBHMC13

Data Sheet
package
software

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S70FL01GSDSBHMC13
S70FL01GSDSBHMC13
Data Sheet

Product details

  • Classification
    ISO 26262-ready
  • Density
    1 GBit
  • Family
    FL-S
  • Interface Bandwidth
    80 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    133 / 80
  • Interfaces
    Quad SPI
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature
    -40 °C to 125 °C
  • Operating Voltage
    3 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2035
  • Qualification
    Automotive
Recommended
OPN
S70FL01GSDSBHMC13
Product Status active and preferred
Infineon Package
PG-TFBGA-24
Package Name FBGA-24 (002-15078)
Packing Size 2500
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-TFBGA-24
Package Name FBGA-24 (002-15078)
Packing Size 2500
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S70FL01GSDSBHMC13 is a 1 Gbit automotive-grade SPI Flash memory based on Infineon's 65 nm MirrorBit® technology with Eclipse™ architecture. It features uniform 256-kbyte sectors, 100,000 program-erase cycles minimum, and 20-year data retention. Supporting SPI Multi-I/O with DDR up to 80 MHz, it operates from 2.7 V to 3.6 V and withstands -40°C to +125°C (AEC-Q100 Grade 1). Ideal for automotive and embedded applications requiring robust, high-density storage.

Features

  • 3.0 V CMOS core technology
  • SPI Multi-I/O interface with DDR support
  • 32-bit extended addressing
  • Compatible with S25FL-A, S25FL-K, S25FL-P SPI
  • Multiple READ commands: Normal, Fast, Dual
  • AutoBoot for automatic read on power-up/reset
  • 512-byte page programming buffer
  • 100,000 program-erase cycles minimum
  • 20-year data retention minimum
  • One-time programmable (OTP) 2048-byte array
  • Block protection with advanced sector options
  • Core voltage: 2.7 V to 3.6 V, I/O: 1.65 V to

Benefits

  • 3.0 V core enables low-power operation
  • Multi-I/O SPI boosts data transfer
  • 32-bit addressing supports large memory maps
  • Footprint compatibility simplifies migration
  • Multiple READ modes optimize speed
  • AutoBoot enables instant code execution
  • Large buffer accelerates programming
  • High endurance ensures long device life
  • 20-year retention secures critical data
  • OTP array adds secure storage options
  • Flexible protection enhances data security
  • Wide voltage range eases system integration

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

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