Active and preferred
RoHS Compliant
Lead-free

S25HS512TDPNHI010

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S25HS512TDPNHI010
S25HS512TDPNHI010

Product details

  • Density
    512 MBit
  • Family
    HS-T
  • Interface Bandwidth
    66 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    133 / 66
  • Interfaces
    Quad SPI
  • Lead Ball Finish
    Matte Tin Plating
  • Operating Temperature
    -40 °C to 85 °C
  • Operating Voltage
    1.8 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2037
  • Qualification
    Industrial
OPN
S25HS512TDPNHI010
Product Status active and preferred
Infineon Package
Package Name DFN-8 (002-15552)
Packing Size 1690
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
Package Name DFN-8 (002-15552)
Packing Size 1690
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S25HS512TDPNHI010 is a 512 Mb SEMPER™ NOR Flash memory with 45-nm MIRRORBIT™ technology, designed for functional safety to ISO 26262 ASIL-B and ASIL-D standards. Supporting Quad, Dual, and standard SPI protocols with up to 102 MBps read rates, it offers flexible sector architectures. Features include ECC, SafeBoot, and Endurance Flex for up to 1,280,000 cycles endurance and 25 years retention. Operating at 1.7 V to 2.0 V, it is AEC-Q100 Grade 1 qualified.

Features

  • 45-nm MIRRORBIT™ stores 2 bits/cell
  • Uniform and hybrid sector architectures
  • 256/512-byte page programming buffer
  • 1024-byte OTP secure silicon array
  • Quad SPI up to 102 MBps (DDR, 102 MHz)
  • Dual SPI up to 41.5 MBps (SDR, 166 MHz)
  • SPI up to 21 MBps (SDR, 166 MHz)
  • Functional safety: ISO26262 ASIL B compliant
  • Endurance Flex: high-endurance/retention
  • Data integrity CRC and built-in ECC (SECDED)
  • SafeBoot for init failure/config corruption
  • Legacy and advanced sector protection

Benefits

  • High density, reliable storage in small
  • Flexible sectoring for varied application
  • Fast programming for efficient data handling
  • Secure OTP for device authentication
  • High-speed Quad/Dual SPI for rapid data
  • Industry-leading functional safety for
  • Partitioning optimizes endurance
  • Robust data integrity with CRC and ECC
  • SafeBoot ensures system recovery and uptime
  • Advanced protection prevents unauthorized
  • Instant boot accelerates system startup
  • Hardware reset enables reliable system

Applications

Documents

Design resources

Developer community

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