Active and preferred
RoHS Compliant

S70KL1282GABHM020

Data Sheet
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S70KL1282GABHM020
S70KL1282GABHM020
Data Sheet

Product details

  • Density
    128 MBit
  • Family
    KL-2
  • Initial Access Time
    35 ns
  • Interface Bandwidth
    400 MByte/s
  • Interface Frequency (SDR/DDR) (MHz)
    - / 200
  • Interfaces
    HYPERBUS
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature range
    -40 °C to 125 °C
  • Operating Voltage max
    3.6 V
  • Operating Voltage
    2.7 V
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    See roadmap
  • Qualification
    Automotive
  • Technology
    HYPERRAM
Recommended
OPN
S70KL1282GABHM020
Product Status active and preferred
Infineon Package
PG-BGA-24
Package Name BGA-24 (002-15550)
Packing Size 3380
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free No
Halogen Free No
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-BGA-24
Package Name BGA-24 (002-15550)
Packing Size 3380
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
S70KL1282GABHM020 is a 128-Mbit HyperRAM self-refresh DRAM with a HyperBus interface, 8-bit DDR DQ[7:0], RWDS read strobe/write mask, CS#, and RESET#. It operates from 2.7 V to 3.6 V VCC/VCCQ, supports clocks up to 200 MHz and throughput up to 400 MBps (3,200 Mbps), with 35 ns max access time. Supports hybrid sleep and deep power-down modes. AEC-Q100 Grade 1 (–40°C to 125°C) in a 24-ball 5x5 FBGA.

Features

  • HyperBus interface
  • 8-bit DQ[7:0] data bus
  • DDR transfers both clock edges
  • 200 MHz maximum clock rate
  • Up to 400 MBps throughput
  • Optional differential CK/CK#
  • RWDS strobe and write data mask
  • Optional DCARS phase-shifted RWDS
  • Configurable burst: linear/wrapped
  • Wrapped bursts: 16/32/64/128 B
  • Hybrid Sleep mode
  • Deep power down mode

Benefits

  • HyperBus cuts pin count vs parallel
  • 8-bit bus simplifies PCB routing
  • DDR boosts bandwidth per clock
  • 200 MHz supports fast memory access
  • 400 MBps feeds high-data apps
  • Diff clock improves signal integrity
  • RWDS eases timing and byte writes
  • DCARS widens read data eye margin
  • Burst options fit access patterns
  • Wrapped bursts reduce boundary hits
  • Sleep mode reduces idle power
  • Deep power down lowers system power

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

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