Active and preferred
RoHS Compliant
Lead-free

CY14B116M-ZSP25XI

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CY14B116M-ZSP25XI
CY14B116M-ZSP25XI

Product details

  • Alarms
    Y
  • Density
    16 MBit
  • Interfaces
    Parallel
  • Lead Ball Finish
    Pure Sn
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) max
    3.6 V
  • Operating Voltage range
    2.7 V to 3.6 V
  • Organization (X x Y)
    1Mb x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2031
  • Qualification
    Industrial
  • Real Time Clock
    Y
  • Speed
    25 ns
  • Watchdog Timer
    Y
OPN
CY14B116M-ZSP25XI
Product Status active and preferred
Infineon Package
Package Name TSOP-II-54 (51-85160)
Packing Size 540
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
Package Name TSOP-II-54 (51-85160)
Packing Size 540
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The CY14B116M-ZSP25XI is a 16-Mbit (1024 K × 16) parallel nvSRAM with an integrated real-time clock. QuantumTrap nonvolatile elements automatically STORE on power-down using an external VCAP capacitor and RECALL on power-up; STORE/RECALL can also be software or pin initiated. It operates from 2.7 V to 3.6 V over -40°C to 85°C in a 54-pin TSOP II, with up to 25 ns access time and 20-year data retention.

Features

  • 16-Mbit nvSRAM (SRAM + NV)
  • 2048K×8 or 1024K×16 array
  • 25 ns / 45 ns access options
  • AutoStore on power-down
  • STORE via software or HSB pin
  • RECALL via power-up or software
  • 1 million STORE cycles
  • 20-year data retention
  • VCC supply 2.7 V to 3.6 V
  • Sleep mode with RTC running
  • 10 µA max sleep mode current
  • RTC alarm, WDT, sq wave out

Benefits

  • SRAM speed with NV data safety
  • Fits x8 or x16 legacy buses
  • 25 ns/45 ns cuts wait states
  • Auto-save prevents data loss
  • STORE on demand for events
  • Fast restore after power-up
  • Endurance supports data logging
  • Long retention cuts maintenance
  • Single 2.7-3.6 V rail eases design
  • Sleep mode reduces system power
  • 10 µA sleep helps battery life
  • RTC blocks reduce external ICs

Applications

Documents

Design resources

Developer community

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