Active and preferred
RoHS Compliant
Lead-free

IMYR140R006M2H

CoolSiC™ MOSFET discrete 1400 V G2 in TO-247PLUS-4 Reflow package

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IMYR140R006M2H
IMYR140R006M2H

Product details

  • Ciss
    9590 pF
  • Coss
    336 pF
  • ID (@25°C) max
    246 A
  • Mounting
    THT
  • Operating Temperature
    -55 °C to 175 °C
  • Package
    PG-TO247-4-U08
  • Pin Count
    4 Pins
  • Polarity
    N
  • Ptot (@ TA=25°C) max
    974 W
  • Qgd
    60 nC
  • QG
    302 nC
  • Qualification
    Industrial
  • RDS (on) (@ Tj = 25°C)
    5.8 mΩ, 6 mΩ
  • RthJA max
    62 K/W
  • RthJC max
    0.15 K/W
  • Technology
    CoolSiC™ G2
  • Tj max
    175 °C
  • VDS max
    1400 V
OPN
IMYR140R006M2HXLSA1
Product Status active and preferred
Infineon Package
Package Name N/A
Packing Size 240
Packing Type TUBE
Moisture Level 2
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
Package Name -
Packing Size 240
Packing Type TUBE
Moisture Level 2
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The CoolSiC™ MOSFET discrete 1400 V, 6 mΩ G2 in a TO-247PLUS-4 Reflow package is ideal for high-output power applications such as EV charging, ESS, CAV and other applications. The CoolSiC™ MOSFET G2 1400 V technology is a cutting-edge technology offering improved thermal performance, increased power density, and enhanced reliability. The package is the reflow capability (3 x reflow soldering possible) enabling lower thermal resistance.

Features

  • VDSS = 1400 V at Tvj = 25°C
  • IDDC = 188 A at TC = 100°C
  • RDS(on)= 5.8 mΩ at VGS= 18 V, Tvj= 25°C
  • Very low switching losses
  • Package backside 3x reflow solderable
  • Overload operation up to Tvj = 200°C
  • Short circuit withstand time 2 µs
  • Benchmark gate threshold voltage 4.2 V
  • Robust against parasitic turn on
  • Robust body diode for hard commutation
  • .XT interconnection technology
  • Package with wide power pins (2 mm)

Benefits

  • Increased power density
  • Increased system output power
  • Improved overall efficiency
  • Robustness against transient overloads
  • Robustness against avalanche condition
  • Robustness against Miller effect
  • Ease of system design
  • Easy paralleling

Documents

Design resources

Developer community

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