Active
RoHS Compliant

FM28V102A-TG

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FM28V102A-TG
FM28V102A-TG
ea.

Product details

  • Density
    1 MBit
  • Family
    Parallel FRAM
  • Interfaces
    Parallel
  • Lead Ball Finish
    NiPdAuAg
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) range
    2 V to 3.6 V
  • Operating Voltage range
    2 V to 3.6 V
  • Organization (X x Y)
    64Kb x 16
  • Peak Reflow Temp
    260 °C
  • Qualification
    Industrial
  • Speed
    60 ns
OPN
FM28V102A-TG
Product Status active
Infineon Package
Package Name TSOP-II-44 (51-85087)
Packing Size 135
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free No
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
ea. in stock

Product Status
Active
Infineon Package
Package Name TSOP-II-44 (51-85087)
Packing Size 135
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
The FM28V102A-TG is a 1-Mbit (64 K × 16) ferroelectric random access memory (F-RAM) providing nonvolatile storage with SRAM-compatible speed and interface. It features 60-ns access time, 100 trillion read/write cycles endurance, and 151-year data retention at 65°C. Operating from 2.0 V to 3.6 V, it offers low power consumption and is housed in a 44-pin TSOP-II package. The device is RoHS compliant and ideal for battery-free, frequent-write applications.

Features

  • 1-Mbit F-RAM, 64 K × 16 organization
  • 100 trillion read/write endurance
  • 151-year data retention at 65°C
  • NoDelay™ immediate nonvolatile writes
  • Page mode operation, 30-ns cycle time
  • Industry-standard parallel SRAM interface
  • 7 mA active, 120 μA standby, 3 μA sleep
  • VDD operation: 2.0 V to 3.6 V
  • 60-ns access, 90-ns cycle time (SRAM)
  • Sleep mode for lowest power
  • Monolithic, battery-free reliability
  • Superior shock, vibration, moisture tolerance

Benefits

  • Eliminates data loss after power-off
  • Enables frequent, rapid data logging
  • No battery or refresh needed
  • Drop-in replacement for SRAM
  • Fast writes boost system performance
  • Low power extends battery life
  • Simple integration with standard SRAM
  • Reliable in harsh environments
  • Long-term data integrity
  • No polling or wait for write complete
  • Reduces maintenance and BOM cost
  • Consistent speed for read and write

Applications

Documents

Design resources

Developer community

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