Active and preferred
RoHS Compliant
Lead-free

CY15V104QN-50SXIT

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CY15V104QN-50SXIT
CY15V104QN-50SXIT

Product details

  • Density
    4 MBit
  • Family
    Excelon™
  • Frequency
    50 MHz
  • Interfaces
    SPI
  • Lead Ball Finish
    Pure Sn
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) range
    1.71 V to 1.89 V
  • Operating Voltage range
    1.71 V to 1.89 V
  • Organization (X x Y)
    512Kb x 8
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial
  • Speed
    0 ns
OPN
CY15V104QN-50SXIT
Product Status active and preferred
Infineon Package
Package Name SOIC-8 (001-85261)
Packing Size 2000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
Package Name SOIC-8 (001-85261)
Packing Size 2000
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The CY15V104QN-50SXIT is a 4-Mb EXCELON™ LP ferroelectric RAM (F-RAM) organized as 512K × 8, offering virtually unlimited endurance of 10^15 read/write cycles and 151-year data retention. Operating from 1.71 V to 1.89 V over –40°C to +85°C, it supports SPI up to 50 MHz and instant non-volatile writes at bus speed. Advanced write protection, low active current, and 8-pin SOIC packaging make it ideal for industrial and data logging applications.

Features

  • 4-Mb ferroelectric RAM, 512K × 8 organization
  • Virtually unlimited 10^15 read/write cycles
  • 151-year data retention at 70°C
  • SPI interface up to 50 MHz
  • Supports SPI mode 0 and mode 3
  • Hardware and software write protection
  • Dedicated 256-byte special sector
  • Unique device ID and serial number
  • Low active current: 2.4 mA at 40 MHz
  • Standby current: 2.3 µA (typ)
  • Deep power-down: 0.7 µA (typ)
  • Hibernate mode: 0.1 µA (typ)

Benefits

  • Reliable for frequent, rapid data logging
  • No wear-out, ideal for mission-critical use
  • Long-term data integrity, minimal refresh
  • Fast SPI enables high-speed system design
  • Flexible integration with standard SPI hosts
  • Enhanced data security and tamper resistance
  • Special sector survives soldering reflow
  • Easy device tracking and authentication
  • Low power extends battery/system life
  • Minimizes standby energy consumption
  • Deep sleep reduces power in idle states
  • Hibernate mode for ultra-low power standby

Documents

Design resources

Developer community

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