Active and preferred
RoHS Compliant
Lead-free

CY14V101NA-BA25XI

Data Sheet
package
ea.
in stock

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CY14V101NA-BA25XI
CY14V101NA-BA25XI
ea.
Data Sheet

Product details

  • Density
    1 MBit
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage range
    2.7 V to 3.6 V
  • Organization (X x Y)
    64Kb x 16
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial
  • Speed
    25 ns
Recommended
OPN
CY14V101NA-BA25XI
Product Status active and preferred
Infineon Package
PG-TFBGA-48
Package Name FBGA-48 (51-85128)
Packing Size 598
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-TFBGA-48
Package Name FBGA-48 (51-85128)
Packing Size 598
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
CY14V101NA-BA25XI is a 1-Mbit (64 K × 16) parallel nvSRAM that combines fast SRAM with QuantumTrap nonvolatile storage per bit. It supports 25 ns access time, automatic STORE on power-down using an external capacitor, and RECALL on power-up or by software. Operates with 3.0 V to 3.6 V core VCC and 1.65 V to 1.95 V I/O VCCQ over -40°C to 85°C, with 20-year retention and 1,000K STORE cycles in a 48-ball FBGA.

Features

  • 1-Mbit nvSRAM (128Kx8/64Kx16)
  • 25 ns and 45 ns access times
  • AutoStore on power-down (VCAP)
  • STORE via HSB pin or software
  • RECALL via power-up or software
  • 20-year data retention
  • 1M STORE cycles (QuantumTrap)
  • Infinite SRAM R/W and RECALL
  • Core VCC 3.0 V to 3.6 V
  • I/O VCCQ 1.65 V to 1.95 V
  • Standby current ISB max 8 mA
  • Input leakage IIX max ±1 µA

Benefits

  • SRAM-like fast random access
  • Auto backup at power loss
  • Avoids battery-backed SRAM
  • Manual STORE for checkpoints
  • Restores state after power returns
  • Keeps data for 20-year shelf life
  • Endures frequent nonvolatile saves
  • No wear-out in normal SRAM use
  • Fits standard 3.3 V core rails
  • Interfaces to 1.8 V logic levels
  • Lower idle power in standby
  • Low leakage reduces bus loading

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

{ "ctalist":[ { "link" : "https://community.infineon.com/t5/forums/postpage/choose-node/true", "label" : "Ask the community", "labelEn" : "Ask the community" }, { "link" : "https://community.infineon.com/t5/Forums/ct-p/products", "label" : "View all discussions", "labelEn" : "View all discussions" } ] }