Active and preferred
RoHS Compliant
Lead-free

CY14B101PA-SFXI

Data Sheet
package
ea.
in stock

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CY14B101PA-SFXI
CY14B101PA-SFXI
ea.
Data Sheet

Product details

  • Alarms
    Y
  • Density
    1 MBit
  • Frequency
    40 MHz
  • Interfaces
    SPI
  • Lead Ball Finish
    Pure Sn
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage (VCCQ) max
    3.6 V
  • Operating Voltage range
    2.7 V to 3.6 V
  • Organization (X x Y)
    128Kb x 8
  • Peak Reflow Temp
    260 °C
  • Qualification
    Industrial
  • Real Time Clock
    Y
  • Speed
    0 ns
  • Watchdog Timer
    Y
Recommended
OPN
CY14B101PA-SFXI
Product Status active and preferred
Infineon Package
PG-DSO-16
Package Name SOIC-16 (51-85022)
Packing Size 920
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-DSO-16
Package Name SOIC-16 (51-85022)
Packing Size 920
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
CY14B101PA-SFXI is a 1-Mbit (128K × 8) SPI nvSRAM with an integrated real-time clock. It stores SRAM data to QuantumTrap nonvolatile elements on power-down (AutoStore) and recalls it on power-up, with 20-year retention at 85°C and 1 million STORE cycles. Runs from 2.7 V to 3.6 V, draws 3 mA at 40 MHz, supports SPI mode 0/3, 40 MHz READ/WRITE and up to 104 MHz fast read, in a 16-pin SOIC.

Features

  • 1-Mbit nvSRAM, 128K × 8
  • STORE to QuantumTrap nonvolatile
  • AutoStore on power-down via VCAP
  • RECALL on power-up or SPI cmd
  • SPI up to 104 MHz (FAST_READ)
  • Supports SPI mode 0 and mode 3
  • 3 mA avg active at 40 MHz
  • 250 µA standby current
  • 8 µA sleep mode current
  • HW write protect via WP pin
  • Block protect 1/4, 1/2, full
  • RTC alarm, WDT, SQW 1 Hz-32 kHz

Benefits

  • SRAM speed with nonvolatile backup
  • Survives power loss automatically
  • VCAP cap enables backup STORE
  • Fast reboot with data auto-restore
  • 104 MHz SPI boosts throughput
  • Easy fit to standard SPI masters
  • Low 3 mA cuts active power
  • 250 µA standby lowers idle drain
  • 8 µA sleep saves battery energy
  • WP pin blocks unintended writes
  • Block protect secures key data
  • RTC cuts need for extra timer ICs

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

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