Active and preferred
RoHS Compliant
Lead-free

CY14B101LA-BA45XI

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CY14B101LA-BA45XI
CY14B101LA-BA45XI

Product details

  • Density
    1 MBit
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage range
    2.7 V to 3.6 V
  • Organization (X x Y)
    128K x 8
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2033
  • Qualification
    Industrial
OPN
CY14B101LA-BA45XI
Product Status active and preferred
Infineon Package
Package Name FBGA-48 (51-85128)
Packing Size 598
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
Package Name FBGA-48 (51-85128)
Packing Size 598
Packing Type TRAY
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
CY14B101LA-BA45XI is a 1-Mbit (128 K × 8) parallel nvSRAM that combines fast SRAM with QuantumTrap nonvolatile storage in each cell. It runs from a single 2.7 V to 3.6 V supply over −40°C to 85°C and supports 45 ns access. Data is automatically STORED on power-down using a 61 µF to 180 µF VCAP, with hardware or software STORE/RECALL, 20-year retention, and 1M STORE cycles; offered in a 48-ball FBGA.

Features

  • QuantumTrap nvSRAM architecture
  • 1-Mbit SRAM with nonvolatile store
  • AutoStore on power-down via VCAP
  • STORE via HSB pin or software seq
  • RECALL via power-up or software seq
  • tSTORE max 8 ms
  • tHRECALL max 20 ms
  • tRECALL max 200 µs
  • VCC 2.7 V to 3.6 V
  • Data retention 20 years
  • 1,000 K nonvolatile STORE cycles
  • Low-VCC inhibit below 2.65 V

Benefits

  • Keeps data on sudden power loss
  • Cuts firmware for NVM management
  • Fast restore after power returns
  • Supports both HW and SW control
  • Predictable save time (8 ms max)
  • Predictable boot recall (20 ms)
  • No write corruption in brownouts
  • 3 V supply fits common logic rails
  • 20-year retention suits logging
  • 1M STORES supports frequent saves
  • Infinite SRAM R/W for high traffic
  • Busy flag (HSB) simplifies timing

Applications

Documents

Design resources

Developer community

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