Active and preferred
RoHS Compliant
Lead-free

CY14B101I-SFXI

Data Sheet
package
ea.
in stock

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CY14B101I-SFXI
CY14B101I-SFXI
ea.
Data Sheet

Product details

  • Alarms
    Y
  • Density
    1 MBit
  • Frequency
    3.4 MHz
  • Interfaces
    I2C
  • Lead Ball Finish
    Ni/Pd/Au
  • Operating Temperature range
    -40 °C to 85 °C
  • Operating Voltage range
    2.7 V to 3.6 V
  • Operating Voltage (VCCQ) max
    3.6 V
  • Organization (X x Y)
    128Kb x 8
  • Peak Reflow Temp
    260 °C
  • Qualification
    Industrial
  • Real Time Clock
    Y
  • Speed
    0 ns
  • Watchdog Timer
    Y
Recommended
OPN
CY14B101I-SFXI
Product Status active and preferred
Infineon Package
PG-DSO-16
Package Name SOIC-16 (51-85022)
Packing Size 920
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:
 ea. in stock

Product Status
Active
Infineon Package
PG-DSO-16
Package Name SOIC-16 (51-85022)
Packing Size 920
Packing Type TUBE
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
ea.
in stock
CY14B101I-SFXI is a 1-Mbit (128 K × 8) serial (I2C) nvSRAM with an integrated real-time clock. QuantumTrap nonvolatile elements automatically STORE SRAM data on power-down and RECALL on power-up; STORE/RECALL can also be triggered by I2C or HSB pin. It supports 100 kHz/400 kHz, 1 MHz, and 3.4 MHz I2C with zero-cycle reads/writes, 20-year retention, and 1,000K STORE cycles, at VCC 2.7 V to 3.6 V and -40°C to 85°C.

Features

  • 1-Mbit nvSRAM (128 K × 8)
  • AutoStore on power-down
  • STORE via I2C or HSB pin
  • RECALL on power-up or I2C
  • I2C clock up to 3.4 MHz
  • Zero-cycle-delay reads/writes
  • WP pin hardware write protect
  • SW block protect 1/4, 1/2, all
  • 20-year retention at 85°C
  • 1,000 K nonvolatile STORE cycles
  • RTC alarm with interrupts
  • Square wave 1 Hz to 32.768 kHz

Benefits

  • Keeps data through power loss
  • AutoStore avoids firmware saves
  • STORE options fit many designs
  • Fast recovery with RECALL
  • 3.4 MHz I2C speeds data access
  • No wait states improves latency
  • WP pin blocks unintended writes
  • Block protect limits update area
  • 20-year retention cuts service
  • High STORE endurance extends life
  • Built-in RTC reduces BOM parts
  • SQW/INT supports timing wakeups

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

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