Active and preferred
RoHS Compliant
Lead-free

S29GL256S10DHV013

Data Sheet
package
software

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S29GL256S10DHV013
S29GL256S10DHV013
Data Sheet

Product details

  • Density
    256 MBit
  • Family
    GL-S
  • Initial Access Time
    100 ns
  • Interface Frequency (SDR/DDR) (MHz)
    NA
  • Interfaces
    Parallel
  • Lead Ball Finish
    Sn/Ag/Cu
  • Operating Temperature range
    -40 °C to 105 °C
  • Operating Voltage range
    2.7 V to 3.6 V
  • Operating Voltage
    3 V
  • Page Access Time
    15 ns
  • Peak Reflow Temp
    260 °C
  • Planned to be available until at least
    2035
  • Qualification
    Industrial
Recommended
OPN
S29GL256S10DHV013
Product Status active and preferred
Infineon Package
PG-LFBGA-64
Package Name FBGA-64 (002-15537)
Packing Size 2200
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead-free Yes
Halogen Free Yes
RoHS Compliant Yes
Infineon stock last updated:

Product Status
Active
Infineon Package
PG-LFBGA-64
Package Name FBGA-64 (002-15537)
Packing Size 2200
Packing Type TAPE & REEL
Moisture Level 3
Moisture Packing DRY
Lead Free
Halogen Free
RoHS Compliant
The S29GL256S10DHV013 is a 256 Mb parallel NOR flash memory using Infineon's MIRRORBIT™ Eclipse technology, designed for high-density embedded and automotive applications. It operates at 3.0 V core with I/O range from 1.65 V to VCC, provides random access times down to 90 ns and page access as fast as 15 ns. Key features include a 512-byte write buffer, advanced sector protection, internal ECC for data integrity, and AEC-Q100 Grade 2 qualification for automotive reliability.

Features

  • 65 nm MIRRORBIT™ Eclipse technology
  • CMOS 3.0 V core with versatile I/O
  • Single supply for read/program/erase
  • Versatile I/O voltage range: 1.65 V to VCC
  • 16-bit data bus
  • Asynchronous 32-byte page read
  • 512-byte programming buffer
  • Internal hardware ECC with single bit
  • Uniform 128 KB sectors
  • Suspend/resume for program and erase
  • Advanced sector protection (ASP)
  • 1024-byte one time program (OTP) array

Benefits

  • High reliability with 65 nm process
  • Flexible I/O supports system integration
  • Easy power supply design
  • Supports wide I/O voltage range
  • Fast data transfers with 16-bit bus
  • Efficient page read for fast access
  • Fast programming with large buffer
  • ECC enhances data integrity
  • Simple sector management
  • Interruptible program/erase for flexibility
  • Robust data and sector protection
  • Secure OTP for permanent data

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

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