CY15B101N-ZS60XET

Data Sheet

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CY15B101N-ZS60XET
CY15B101N-ZS60XET
Data Sheet

Product details

  • Density
    1 MBit
  • Interfaces
    Parallel
  • Operating Temperature range
    -40 °C to 125 °C
  • Operating Voltage range
    2 V to 3.6 V
  • Organization (X x Y)
    64Kx16
  • Qualification
    Automotive(E)
OPN
Product Status
Infineon Package
Package Name
Packing Size
Packing Type
Moisture Level
Moisture Packing
Lead-free
Halogen Free
RoHS Compliant
Infineon stock last updated:
The CY15B101N-ZS60XET is a 1-Mbit (64K × 16) nonvolatile F-RAM with an SRAM-compatible parallel interface for drop-in replacement. It operates from 2.0 V to 3.6 V over –40°C to +125°C and comes in a 44-pin TSOP-II (51-85087) with a ZZ sleep pin. Performance includes 60 ns access, 90 ns cycle time, and 30 ns page mode. It supports 10^13 read/write endurance and 121-year retention at 85°C.

Features

  • 1-Mbit F-RAM, 64K × 16 array
  • Configurable 128K × 8 via UB/LB
  • VDD operation 2.0 V to 3.6 V
  • Active current 7 mA typ at 3.6 V
  • Standby current 120 µA typ
  • Sleep current 3 µA typ (ZZ LOW)
  • Endurance 10^13 read/write cycles
  • Data retention 121 years at 85°C
  • Page-mode access time 30 ns
  • Read cycle time 90 ns (VDD>2.7 V)
  • Write cycle time 90 ns (VDD>2.7 V)
  • ESD: HBM 2 kV, CDM 500 V

Benefits

  • Keeps data with power removed
  • Drop-in SRAM replacement design
  • UB/LB enables byte-wide mapping
  • Runs from 2.0–3.6 V rails
  • Low active current cuts power
  • Low standby current cuts idle draw
  • Sleep mode saves energy via ZZ
  • 10^13 cycles suits frequent writes
  • Long retention reduces service risk
  • 30 ns page mode boosts throughput
  • 90 ns cycles fit fast bus timing
  • ESD robustness improves reliability

Applications

Documents

Documents

Design resources

Partner solutions

Developer community

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