Infineon Technologies Introduces New Type of High Performance Memory, Specifically Designed for Networking and High-Speed Cache Applications
Munich/Germany, April 11, 2001 Infineon Technologies (FSE/NYSE: IFX) today introduced a new DRAM product line for the strongly growing market of networking applications. The RLDRAM (Reduced Latency DRAM) family combines three important features specifically needed in networking and cache applications; high density, high bandwidth, and fast random SRAM-like access.
The RLDRAM is a high performance SDRAM operating at 300MHz clock frequency and using a Double Data Rate (DDR) interface. The first product is a 256 Mbit device, which comes in 8Mx32 and 16Mx16 organizations. The RLDRAM provides 8 internal memory banks. Accessing these banks in a sequential manner, the RLDRAM offers a sustained data bandwidth of 19.2 Gbit/s, while still allowing random access within each bank.
The RLDRAM is based on a new internal memory architecture, which allows an ultra-fast random access with row cycle times down to 25ns. Standard SDRAMs operate at row cycle times of 50ns. The RLDRAM thereby closes the gap between DRAM and SRAM offering an ideal solution for networking and cache applications.
The architecture of the RLDRAM has been optimized to allow the shortest possible row cycle time and specifically minimizes the latency, i.e. the time from the beginning of the access cycle to the availability of the first data. This access time is particularly critical in all applications where the subsequent actions depend on the early termination of a previous memory look-up. Typical examples are applications in networking, e.g. in switches and routers where controllers need to read routing tables in the fastest possible time or assemble data packets quickly, as well as in cache applications where a short reaction time is critical for the total response time of the memory subsystem. All these applications now have an alternative to the use of expensive SRAM.
The Thin Profile Ball Grid Array (T-FBGA 144) package allows system designers to avoid the slow and cumbersome address multiplexing traditionally used in TSOP-packaged DRAM products. Additionally this package offers reduced parasitics for high frequency operation as well as low thermal resistance for an optimum heat transfer to the printed circuit board and the ambient air.
Standard SDRAMs operate at 3.3 volts, whereas the RLDRAM operates from 2.5V and 1.8V volts for the memory array and 1.8 volts for the I/O section. This voltage reduction allows for data transfer on board at frequencies up to 300MHz (600 Mbit/sec), which is equivalent to a bandwidth of 2.4 Gbytes/s per device for the x32 organization and 1.2 Gbytes/s for the x16 part.
The RLDRAM is a new product line featuring an innovative chip architecture and data protocol which pushes out the limits of random access data bandwidth, said Ernst Strasser, Director of Product Marketing for Graphics and Specialty Memories at Infineons Memory Business Group. The RLDRAM is an example of how Infineon is applying its expertise in chip design and manufacturing in product offerings to meet strongly growing demand for high-performance memory in the networking market.
First samples of the 256-Mbit RLDRAM organized 8Mx32 and 16Mx16 will be available in Q3 of 2001. Volume production is expected to begin in 2002.
For additional information about Infineons product portfolio of DRAMs and modules, please visit www.infineon.com/products/memory
The RLDRAM is a high performance SDRAM operating at 300MHz clock frequency and using a Double Data Rate (DDR) interface. The first product is a 256 Mbit device, which comes in 8Mx32 and 16Mx16 organizations. The RLDRAM provides 8 internal memory banks. Accessing these banks in a sequential manner, the RLDRAM offers a sustained data bandwidth of 19.2 Gbit/s, while still allowing random access within each bank.
The RLDRAM is based on a new internal memory architecture, which allows an ultra-fast random access with row cycle times down to 25ns. Standard SDRAMs operate at row cycle times of 50ns. The RLDRAM thereby closes the gap between DRAM and SRAM offering an ideal solution for networking and cache applications.
The architecture of the RLDRAM has been optimized to allow the shortest possible row cycle time and specifically minimizes the latency, i.e. the time from the beginning of the access cycle to the availability of the first data. This access time is particularly critical in all applications where the subsequent actions depend on the early termination of a previous memory look-up. Typical examples are applications in networking, e.g. in switches and routers where controllers need to read routing tables in the fastest possible time or assemble data packets quickly, as well as in cache applications where a short reaction time is critical for the total response time of the memory subsystem. All these applications now have an alternative to the use of expensive SRAM.
The Thin Profile Ball Grid Array (T-FBGA 144) package allows system designers to avoid the slow and cumbersome address multiplexing traditionally used in TSOP-packaged DRAM products. Additionally this package offers reduced parasitics for high frequency operation as well as low thermal resistance for an optimum heat transfer to the printed circuit board and the ambient air.
Standard SDRAMs operate at 3.3 volts, whereas the RLDRAM operates from 2.5V and 1.8V volts for the memory array and 1.8 volts for the I/O section. This voltage reduction allows for data transfer on board at frequencies up to 300MHz (600 Mbit/sec), which is equivalent to a bandwidth of 2.4 Gbytes/s per device for the x32 organization and 1.2 Gbytes/s for the x16 part.
The RLDRAM is a new product line featuring an innovative chip architecture and data protocol which pushes out the limits of random access data bandwidth, said Ernst Strasser, Director of Product Marketing for Graphics and Specialty Memories at Infineons Memory Business Group. The RLDRAM is an example of how Infineon is applying its expertise in chip design and manufacturing in product offerings to meet strongly growing demand for high-performance memory in the networking market.
Availability
First samples of the 256-Mbit RLDRAM organized 8Mx32 and 16Mx16 will be available in Q3 of 2001. Volume production is expected to begin in 2002.
For additional information about Infineons product portfolio of DRAMs and modules, please visit www.infineon.com/products/memory
About Infineon
Infineon Technologies AG, Munich, Germany, offers semiconductor and system solutions for applications in the wired and wireless communications markets, for security systems and smartcards, for the automotive and industrial sectors, as well as memory products. With a global presence, Infineon operates in the US from San Jose, CA, in the Asia-Pacific region from Singapore and in Japan from Tokyo. In the fiscal year 2000 (ending September), the company achieved sales of Euro 7.28 billion with about 29,000 employees worldwide. Infineon is listed on the DAX index of the Frankfurt Stock Exchange and on the New York Stock Exchange (ticker symbol: IFX). Further information is available at www.infineon.com
Information Number
INFMP200104.071e
Press Photos
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