Ventures News: Monterey Progressive Refinement Selected for Multi-Million Gate Nanometer System-on-Chip Designs by Ricoh
Sunnyvale, California - April 22, 2003 - Monterey Design Systems today announced that Ricoh Co. Ltd., a leading global manufacturer of office automation equipment and digital imaging systems, has purchased the entire line of Monterey planning, prototyping, and implementation tools for immediate use in Japan.
"As is the industry trend, we at Ricoh have an urgent need to establish a hierarchical physical design flow that will support the ever-increasing size and complexity of our SoC designs," said Zenji Oka, Manager of the CAD Engineering Section, Image System LSI Development Center at Ricoh. "We evaluated a number of offerings from different vendors and found the Monterey Progressive Refinement solution to be the most powerful and productive solution for our needs. In just over a day, we had succeeded in developing the hierarchical chip-level design plan and physical prototypes for all of the blocks and for the top-level assembly."
Ricoh's decision to choose Monterey for their hierarchical design flow was based on results achieved on a complex 10-million gate hierarchical SoC design. The Monterey Progressive Refinement methodology, realized through the application of the IC Wizard hierarchical design planner and Sonar physical synthesis and prototyper, delivered an optimized top-level design plan and accurate physical prototypes of all twelve top-level blocks and of the top-level assembly in just over 25 hours. IC Wizard and Sonar generated timing budgets for all blocks, physical prototypes for all blocks including power networks and synthesized clock trees, and a physical prototype for the top-level assembly including timing constraint validation and congestion analysis.
Ricoh plans to deploy the Monterey based solution on designs implemented in 0.13 and 0.18 micron processes.
Planning and Prototyping Are the Keys to Total Design Closure
During the evaluation, the Monterey Progressive Refinement solution clearly demonstrated the ability to quickly generate high-quality design plans and very accurate physical prototypes. On hierarchical designs of ten million gates and larger, the Monterey solution performed top-down planning and constraint management while considering all available physical information at the appropriate level of abstraction, and bottom-up design refinement as more detailed information became available. This progression from design planning through physical prototyping to final physical implementation ensures a predictable path to total design closure. The solution was proven on this 10-million gate design within the memory and runtime bounds defined by Ricoh.
Evaluation Results
Ricoh was able to generate the top-level design plan and physical prototypes for all blocks and for the top-level assembly in just over 25 hours. The criteria that Ricoh used to evaluate the product offerings were grouped into three categories: hierarchical design planning, physical prototyping, and implementation.
Hierarchical Design Planning
In just over one hour of run time, the IC Wizard hierarchical design planner constructed and analyzed the design plan. The block-level data was automatically abstracted enabling exploration of multiple placements of the top-level blocks and ports. The global power network was constructed; the resulting power rails were "pushed" down into the blocks. The JTAG logic cells were automatically placed near their associated I/O buffers.
Timing Budgeting
In less than three hours, IC Wizard and the Sonar physical synthesis and prototyper partitioned the top-level timing constraints and assigned the constraints as budgets to each of the top-level blocks.
Physical Prototyping
In 21 hours, Sonar created accurate, detailed prototypes for all 12 of the top-level blocks and for the top-level assembly. The prototypes proved to be extremely accurate because they included fully routed power networks, synthesized clock trees, and placed clock buffers. In addition, the prototypes provided accurate predictions of timing and routing congestion at all levels.
Monterey Progressive Refinement
As the cost of design rises exponentially with each new generation of process technology, the penalty of making a bad decision early in the design cycle becomes increasingly severe. Monterey's patented Progressive Refinement technology provides design teams with valuable information about the final physical implementation very early in the design cycle. With Monterey planning, prototyping, and implementation tools, the design team can make informed decisions early in the design cycle that will ultimately determine the success or failure of the chip - decisions such as the choice of process technology, the structure of global power network, and the chip-level design plan.
Customers have been taping out chips using Monterey planning and prototyping tools for over three years. Today, Monterey offers the only production-proven planning and prototyping tool suite available from any source. Seven of the top ten semiconductor companies in the world are using Monterey planning and prototyping tools in their production flows.
Monterey was recently awarded its twelfth Progressive Refinement patent by the U.S. Patent and Trademark Office.
http://www.montereydesign.com/newsevents/press/2003_03_13.html
To learn more about the technology incorporated in Monterey products, please refer to:
http://www.montereydesign.com/about/technology.htm
About Monterey Design Systems
Monterey Design Systems provides electronic design automation software that enables integrated circuit designers to take their circuits from completed logic design to manufacturing ready output. Built to handle the most demanding semiconductor process requirements, the company's products - IC Wizard hierarchical design planner, Sonar physical synthesis and prototyper, and Dolphin physical implementation system - combine to provide the most streamlined physical design flow on the market. Monterey Design Systems is privately held and partners with other leading EDA companies, such as Cadence (NYSE:CDN - news) and Synopsys (Nasdaq:SNPS - news), to ensure interoperability in all existing design flows. Seven of the top ten semiconductor companies in the world use Monterey products in their production flows. Key customers include Ricoh, Canon, Toshiba, Fujitsu Limited, NEC Electronics, LSI Logic, and STMicroelectronics. Monterey Design Systems is located at 894 Ross Drive, Sunnyvale, CA 94089-1443, tel: 1.408.747.7370, fax: 1.408.747.7377, http:// www.montereydesign.com
About Ricoh Company Ltd.
Ricoh Company Ltd. is a leading global manufacturer of office automation equipment and digital imaging systems, including copiers, printers, facsimile machines, DVD+RW/+R drives and media, and related suppliers and services.
Ricoh is also prominent in digital cameras and advanced electric devices. The Electronic Devices Company within Ricoh manufactures application-specific integration circuits that process images for its MFPs and printers, as well as advanced LSIs, and power ICs that conserve electricity, second- generation battery ICs, real-time clock ICs, and analog LSIs for mobile phones. The company enjoys large shares in the markets for PC interface LSIs, DVD+RW/+R controllers, and application-specific standard products based on JPEG 2000 and other systems technologies.
Ricoh has 137 consolidated subsidiaries and affiliates in Japan and 267 overseas, together employing around 74,200 people. In the fiscal year ended March 31, 2002, net sales were 1,672-billion-yen and net income was 61.6billion-yen. For more information, visit the company's website, http:// www.ricoh.com
"As is the industry trend, we at Ricoh have an urgent need to establish a hierarchical physical design flow that will support the ever-increasing size and complexity of our SoC designs," said Zenji Oka, Manager of the CAD Engineering Section, Image System LSI Development Center at Ricoh. "We evaluated a number of offerings from different vendors and found the Monterey Progressive Refinement solution to be the most powerful and productive solution for our needs. In just over a day, we had succeeded in developing the hierarchical chip-level design plan and physical prototypes for all of the blocks and for the top-level assembly."
Ricoh's decision to choose Monterey for their hierarchical design flow was based on results achieved on a complex 10-million gate hierarchical SoC design. The Monterey Progressive Refinement methodology, realized through the application of the IC Wizard hierarchical design planner and Sonar physical synthesis and prototyper, delivered an optimized top-level design plan and accurate physical prototypes of all twelve top-level blocks and of the top-level assembly in just over 25 hours. IC Wizard and Sonar generated timing budgets for all blocks, physical prototypes for all blocks including power networks and synthesized clock trees, and a physical prototype for the top-level assembly including timing constraint validation and congestion analysis.
Ricoh plans to deploy the Monterey based solution on designs implemented in 0.13 and 0.18 micron processes.
Planning and Prototyping Are the Keys to Total Design Closure
During the evaluation, the Monterey Progressive Refinement solution clearly demonstrated the ability to quickly generate high-quality design plans and very accurate physical prototypes. On hierarchical designs of ten million gates and larger, the Monterey solution performed top-down planning and constraint management while considering all available physical information at the appropriate level of abstraction, and bottom-up design refinement as more detailed information became available. This progression from design planning through physical prototyping to final physical implementation ensures a predictable path to total design closure. The solution was proven on this 10-million gate design within the memory and runtime bounds defined by Ricoh.
Evaluation Results
Ricoh was able to generate the top-level design plan and physical prototypes for all blocks and for the top-level assembly in just over 25 hours. The criteria that Ricoh used to evaluate the product offerings were grouped into three categories: hierarchical design planning, physical prototyping, and implementation.
Hierarchical Design Planning
In just over one hour of run time, the IC Wizard hierarchical design planner constructed and analyzed the design plan. The block-level data was automatically abstracted enabling exploration of multiple placements of the top-level blocks and ports. The global power network was constructed; the resulting power rails were "pushed" down into the blocks. The JTAG logic cells were automatically placed near their associated I/O buffers.
Timing Budgeting
In less than three hours, IC Wizard and the Sonar physical synthesis and prototyper partitioned the top-level timing constraints and assigned the constraints as budgets to each of the top-level blocks.
Physical Prototyping
In 21 hours, Sonar created accurate, detailed prototypes for all 12 of the top-level blocks and for the top-level assembly. The prototypes proved to be extremely accurate because they included fully routed power networks, synthesized clock trees, and placed clock buffers. In addition, the prototypes provided accurate predictions of timing and routing congestion at all levels.
Monterey Progressive Refinement
As the cost of design rises exponentially with each new generation of process technology, the penalty of making a bad decision early in the design cycle becomes increasingly severe. Monterey's patented Progressive Refinement technology provides design teams with valuable information about the final physical implementation very early in the design cycle. With Monterey planning, prototyping, and implementation tools, the design team can make informed decisions early in the design cycle that will ultimately determine the success or failure of the chip - decisions such as the choice of process technology, the structure of global power network, and the chip-level design plan.
Customers have been taping out chips using Monterey planning and prototyping tools for over three years. Today, Monterey offers the only production-proven planning and prototyping tool suite available from any source. Seven of the top ten semiconductor companies in the world are using Monterey planning and prototyping tools in their production flows.
Monterey was recently awarded its twelfth Progressive Refinement patent by the U.S. Patent and Trademark Office.
http://www.montereydesign.com/newsevents/press/2003_03_13.html
To learn more about the technology incorporated in Monterey products, please refer to:
http://www.montereydesign.com/about/technology.htm
About Monterey Design Systems
Monterey Design Systems provides electronic design automation software that enables integrated circuit designers to take their circuits from completed logic design to manufacturing ready output. Built to handle the most demanding semiconductor process requirements, the company's products - IC Wizard hierarchical design planner, Sonar physical synthesis and prototyper, and Dolphin physical implementation system - combine to provide the most streamlined physical design flow on the market. Monterey Design Systems is privately held and partners with other leading EDA companies, such as Cadence (NYSE:CDN - news) and Synopsys (Nasdaq:SNPS - news), to ensure interoperability in all existing design flows. Seven of the top ten semiconductor companies in the world use Monterey products in their production flows. Key customers include Ricoh, Canon, Toshiba, Fujitsu Limited, NEC Electronics, LSI Logic, and STMicroelectronics. Monterey Design Systems is located at 894 Ross Drive, Sunnyvale, CA 94089-1443, tel: 1.408.747.7370, fax: 1.408.747.7377, http:// www.montereydesign.com
About Ricoh Company Ltd.
Ricoh Company Ltd. is a leading global manufacturer of office automation equipment and digital imaging systems, including copiers, printers, facsimile machines, DVD+RW/+R drives and media, and related suppliers and services.
Ricoh is also prominent in digital cameras and advanced electric devices. The Electronic Devices Company within Ricoh manufactures application-specific integration circuits that process images for its MFPs and printers, as well as advanced LSIs, and power ICs that conserve electricity, second- generation battery ICs, real-time clock ICs, and analog LSIs for mobile phones. The company enjoys large shares in the markets for PC interface LSIs, DVD+RW/+R controllers, and application-specific standard products based on JPEG 2000 and other systems technologies.
Ricoh has 137 consolidated subsidiaries and affiliates in Japan and 267 overseas, together employing around 74,200 people. In the fiscal year ended March 31, 2002, net sales were 1,672-billion-yen and net income was 61.6billion-yen. For more information, visit the company's website, http:// www.ricoh.com