EZ-PD™ PMG1 Portfolio High-voltage MCUs USB-C Power Delivery
Power Delivery Microcontroller Gen 1 (EZ-PD™ PMG1): High-voltage MCU with USB-C capability
EZ-PD™ PMG1 (Power Delivery Microcontroller Gen 1) is a family of high-voltage microcontrollers (MCU) with USB-C power delivery (PD). These chips include an Arm® Cortex®-M0/M0+ CPU and USB-C PD controller along with analog and digital peripherals. EZ-PD™ PMG1 is targeted for any embedded system that provides/consumes power to/from a high-voltage USB-C PD port and leverages the microcontroller to provide additional control capability.
The EZ-PD™ PMG1 family has a market-proven USB PD stack, ensuring spec compliance and interoperability. It’s the only high-voltage, programmable USB power delivery solution on the market today, complete with an integrated Arm® Cortex®-M0/M0+, up to 256 KB flash and 32 KB RAM, a USB full speed device, and analog and digital peripherals. The EZ-PD™ PMG1 family offers devices at the low end with 64 KB of flash and at the high end with 256 KB of flash. The EZ-PD™ PMG1 family offers customers a unified FW view with an SDK supported in ModusToolbox™, enabling seamless migration between all EZ-PD™ PMG1 devices.
| Subsystem or Range | Item | PMG1-S0 | PMG1-S1 | PMG1-S2 | PMG1-S3 |
| CPU and Memory Sub-system | Core | Arm® Cortex®-M0 | Arm® Cortex®-M0 | Arm® Cortex®-M0 | Arm® Cortex®-M0 |
| Max Freq (MHz) | 48 | 48 | 48 | 48 | |
| Flash (KB) | 64 | 128 | 128 | 256 | |
| SRAM (KB) | 8 | 12 | 8 | 32 | |
| Power Delivery | Power Delivery Ports | 1 | 1 | 1 | 1 port for 48-QFN 2 ports for 97-BGA |
| Role | Sink | DRP | DRP | DRP | |
| MOSFET Gate Drivers | 1x PFET | 2x PFET | 2x NFET | Flexible 2x NFET | |
| Fault Protections | VBUS OVP[3] and UVP[4] | VBUS OVP, UVP, OCP[5], SCP[6] and RCP[7] | VBUS OVP, UVP and OCP | VBUS OVP, UVP, OCP, SCP and RCP | |
| USB | Integrated Full Speed USB 2.0 Device with Billboard Class Support | No | No | Yes | Yes |
| Voltage Range | Supply (V) | VDDD (2.7–5.5) VBUS (4–21.5) |
VSYS (2.75–5.5) VBUS (4– 21.5) |
VSYS (2.7–5.5) VBUS (4–21.5) |
VSYS (2.8–5.5) VBUS (4–28) |
| IO (V) | 1.71 - 5.5 | 1.71 - 5.5 | 1.71 - 5.5 | 1.71 - 5.5 | |
| Digital | SCB (configurable as I2C/UART/SPI) | 2 | 4 | 4 | . 7 for 48-QFN (out of which only 5 can be configured as SPI and UART) 8 for 97-BGA |
| TCPWM Block (configurable as timer, counter or pulse-width modulator) |
4 | 2 | 4 | 7 for 48-QFN 8 for 97-BGA |
|
| Hardware Authentication Block (Crypto) |
No | No | Yes (AES[8]-128/192/256, SHA1[9], SHA2-224, SHA2-256, PRNG10[10], CRC[11]) |
Yes (AES-128, SHA2-256, TRNG[12], Vector Unit) |
|
| Analog | ADC | 2x 8-bit SAR | 1x 8-bit SAR | 2x 8-bit SAR | 2x 8-bit SAR 1x 12-bit SAR |
| On-chip Temperature Sensor | Yes | Yes | Yes | Yes | |
| Direct Memory Access (DMA) | DMA | No | No | No | Yes |
| GPIO | Max # of I/O | 12 (10 + 2 OVT[13]) | 17 (15 + 2 OVT) | 20 (18 + 2 OVT) | 26 (24 + 2 OVT) for 48-QFN 50 (48 + 2 OVT) for 97-BGA |
Notes
3. OVP = Overvoltage Protection
4. UVP = Undervoltage Protection
5. OCP = Overcurrent Protection
6. SCP = Short Circuit Protection and is supported in Source configuration only.
7. RCP = Reverse Current Protection and is supported in Source configuration only.
8. AES = Advanced Encryption Standard
9. SHA = Secure Hash Algorithm
10. PRNG = Pseudo Random Number Generation
11. CRC = Cyclic Redundancy Check
12. TRNG = True Random Number Generation
13. OVT = Over Voltage Tolerant
- Supports up to 28 V on VBUS EPR
- VBUS FET gate drivers
- VBUS fault protections: OVP, OCP, UVP, SCP and RCP
- 48-MHz Arm® Cortex® M0/M0+ MCU with DMA controller and RTC
- Up to 256 KB flash and 32KB RAM
- USB full speed device with BC v1.2
- One 12-bit, 1 MS/second ADC
- 2x low-power comparators, OpAmps
- CAPSENSE™ with SmartSense auto-tuning
- 2x 7-bit current-output IDACs configurable as a single 8-bit IDAC
- Up to 8x 16-bit TCPWM blocks
- Up to 8x serial communication blocks (SCBs): I²C master or slave, SPI master or slave, UART
- 24-, 40-, 48- QFN, and 97-BGA
