EZ-USB™ SX3 SuperSpeed USB 3.0 Peripheral Controller
Universal Serial Bus (USB) integration, configurable interface and ultra low-power in core power-down mode
Infineons’ EZ-USB™ SX3 is a Configurable SuperSpeed peripheral controller, providing integrated and flexible features. SX3 has a fully configurable, parallel interface called General Configurable Interface, which can connect to any ASIC, ISP, image sensor or FPGA that supports Slave FIFO or Video interface.
SX3 has integrated the USB 3.2 Gen 1 and USB 2.0 physical layers (PHYs) along with a 32-bit ARM926EJ-S microprocessor for powerful data processing and for building custom applications. It implements an architecture that enables 375-MBps data transfer from General Configurable Interface to the USB interface.
SX3 contains 512 KB of on-chip SRAM for code and data. EZ-USB SX3 also provides interfaces to connect to serial peripherals such as SPI and I2C.
SX3 comes with “SX3 Configuration Utility”, that will help customers to configure the SX3 for various applications. This tool can also merge the FPGA configuration or ISP firmware along with SX3 configuration and stores it in a single SPI Flash. SX3 complies with the USB 3.2 Gen 1 specification and is also backward compatible with USB 2.0.
- Universal Serial Bus (USB) integration
- USB 3.2, Gen 1 and USB 2.0 peripherals compliant with USB 3.2 Specification Revision 1.0
- 5-Gbps SuperSpeed PHY compliant with USB 3.2 Gen 1
- Three physical endpoints
- Supports UVC, UAC, and USB vendor class protocol
- General Configurable Interface
- Support up to 100 MHz
- 8-, 16-, 24-, and 32-bit data bus
- Supports Slave FIFO, parallel camera interface
- 32-bit CPU
- ARM926EJ core with 200-MHz operation
- 512-KB embedded SRAM
- Additional connectivity to the following peripherals
- SPI boot flash
- I2C slaves at 100 kHz / 400 kHz / 1 MHz
- Selectable clock input frequencies
- 19.2, 26, 38.4, and 52 MHz
- 19.2-MHz crystal input support
- Ultra low-power in core power-down mode
- Less than 60 µA with VBATT on and 20 µA with VBATT off
- Independent power domains for core and I/O
- Core operation at 1.2 V
- SPI operation at 1.8 V to 3.3 V
- I2C operation at 1.2 V to 3.3 V
- Package options
- 121-ball, 10-mm ´ 10-mm, 0.8-mm pitch Pb-free ball grid array (BGA)
- EZ-USB™ SX3 configuration utility for configuration of SX3
- Works on Windows, macOS, Linux
- Example configurations for image sensor, HDMI receiver and data applications
- Supports programming of SX3 and configure the FPGA
- Supports merging of FPGA configuration with SX3 configuration and store in a single SPI flash
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