Quad SPI Flash
Keep your code safe and critical system running
Infineon offers a wide range of quad SPI NOR Flash memories based on industry standard Floating Gate and proprietary MIRRORBIT™ technologies. For embedded systems, NOR Flash is ideal for code storage due to its fast, random read performance. This performance also supports XiP (eXecute in Place) functionality which allows host controllers to execute code directly from NOR Flash memory without needing to first copy the code to a RAM. Products are available in a wide range of densities and low-pin-count package options.
The industry-standard quad SPI (Serial Peripheral Interface) interface is supported by virtually all modern chipsets, making it an easy choice. Infineon offers a wide range of design resources to simplify development and accelerate your time-to-market.
For automotive applications, parts are AEC-Q100-qualified for temperatures up to +125°C, and PPAP (Production Part Approval Process) support is available upon request.
Infineon complements all its products with world class quality and support.
MIRRORBIT™ technology is the world’s most advanced NOR Flash process technology and is optimal for high density devices. It stores two bits per cell enabling high density NOR Flash memories.
MIRRORBIT™ technology is the world’s most advanced NOR Flash process technology and is optimal for high density devices. It stores two bits per cell enabling high density NOR Flash memories.
Infineon works with chipset partners to qualify Infineon memories with partner SoCs. Chipset partners get early access to Infineon products and dedicated support to qualify our memories on their boards. These efforts result in pairing charts that map our Infineon memory products with chipset partner product portfolios. The table below contains links to the pairing charts. Select a memory from these pairing charts to shorten your design cycle.
Chipset pairing charts:
- Map Infineon memory products with our chipset partner portfolios
- Indicate for each SoC, the supported memory interfaces
- Highlight both recommended memories and qualified memories
- Indicate (when applicable) which software version has been qualified
Infineon IC qualification with an SoC is performed by our SoC partner via a reference design, evaluation board, bring-up board, demonstration board, validation board, or turnkey reference design.
Guidelines for how to use chipset pairing charts:
- Use them to select the best Infineon solution(s) for your chipset of choice
- Use them to fine-tune the selection of Infineon solutions (compliant memory interface, voltage, memory density, etc.)
Do you have a question about pairing Infineon memory with a particular chipset, whether or not referenced on our site? Do you have a more generic question about Infineon memory support with a given chipset partner? Please Get in Touch with us!
| Chipset Partner/ Family |
Quad I/O Serial NOR Flash (Floating-Gate, MirrorBit, Semper) |
x8 Serial NOR Flash (HyperFlash, Semper HyperBus / Octa SPI, Dual Quad-SPI) and HyperRAM |
Parallel NOR Flash |
Synchronous SRAM |
|
Ambarella Inc. |
|
|
|
|
|
Aspeed Technology |
|
|
|
|
|
Faraday Technology Corporation |
|
|
|
|
|
HiSilicon Semiconductor Co., Ltd |
|
|
|
|
|
Infineon (MCU and SoC) |
|
|
|
|
|
Intel (FPGA) |
|
|
|
|
|
Maxlinear |
|
|
|
|
|
Marvell Technology Group |
|
|
|
|
|
Maxim Integrated, Inc. |
|
|
|
|
|
MediaTek, Inc. |
|
|
|
|
|
Mobileye |
|
|
|
|
|
Novatek |
|
|
|
|
|
NVIDIA Corporation |
|
|
|
|
|
NXP Semiconductors |
|
|
|
|
|
Qualcomm Incorporated |
|
|
|
|
|
Realtek Semiconductor Corp. |
|
|
|
|
|
Renesas Electronics Corporation |
|
|
|
|
|
|
|
|
|
|
|
STMicroelectronics |
|
|
|
|
|
SunPlus |
|
|
|
|
|
Telechips |
|
|
|
|
|
Texas Instruments Incorporated |
|
|
|
|
|
Toshiba Corporation |
|
|
|
|
|
|
|
|
|
|
| Company |
Parallel NOR |
SPI NOR |
HyperFlash |
Semper |
Semper |
Semper |
|||
| S29GL-S |
S29GL-T |
S25FL-S |
S25FS-S |
S25FL-L |
S26KL-S |
S25HL-T |
S28HL-T |
S26HL-T |
|
| Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
|
| Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
|
| Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
|
| Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
|
| Y |
Y |
Y |
Y |
Y |
|
Y |
Y |
Y |
|
| Y |
Y |
Y |
Y |
Y |
|
Y |
Y |
Y |
|
| Y |
Y |
Y |
Y |
Y |
|
Y |
Y |
Y |
|
| Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
|
| Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
|
| Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
|
| Y |
|
Y |
Y |
Y |
|
Y |
Y |
Y |
|
|
|
|
Y |
Y |
Y |
|
|
|
|
|
| Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
|
| Y |
Y |
Y |
Y |
Y |
|
Y |
Y |
Y |
|
| Y |
Y |
Y |
Y |
Y |
|
Y |
Y |
|
|
| Y |
Y |
Y |
Y |
Y |
|
Y |
Y |
Y |
|
| Y |
Y |
Y |
Y |
Y |
|
Y |
Y |
Y |
|
| Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
|
