CYPM1211-40LQXI - Infineon Technologies

Overview

EZ-PD™ PMG1-S2 in 4900 tray packing

EZ-PD™ PMG1-S2 CYPM1211-40LQXI is the tray packing type option of the PMG1-S2, it supports Dual Role Port (DRP) USB-C PD applications and integrates a USB full-speed device controller.

The EZ-PD™ PMG1-S2 USB PD subsystem interfaces to the pins of a USB Type-C connector. It includes a USB Type-C baseband transceiver and physical-layer logic. This transceiver performs the BMC and the 4b/5b encoding and decoding functions as well as integrating the 1.2-V analog front end (AFE). This subsystem integrates the required terminations to identify the role of the EZ-PD™ PMG1-S2 device, including RP and RD for UFP/DFP roles. It also integrates power FETs for supplying VCONN power to the CC1/CC2 pins from the VCONN_Source pin. The analog crossbar enables connecting either of the SBU1/SBU2 pins to either of the AUX_P/AUX_N pins to support DisplayPort sideband signaling. The integrated HPD processor can be used to control or monitor the HPD signal of a DisplayPort source or sink

EZ-PD™ PMG1-S2 has four SCBs, which can be configured to implement an I²C, SPI, or UART interface. The hardware I2 C blocks implement full multi-master and slave interfaces capable of multimaster arbitration. In the SPI mode, the SCB blocks can be configured to act as master or slave. The high-voltage microcontroller has up to 20 GPIOs (these GPIOs can be configured for GPIOs, SCB, SBU, and Aux signals) and SWD pins, which can also be used as GPIOs. The I²C pins from SCB 0 are overvoltage-tolerant.

The EZ-PD™ PMG1 family has a rich set of documentation, development tools, and online resources to assist system designers during their development process. ModusToolbox™ with PMG1-S0 SDK, along with the CY71112 kit and its quick start guide, make firmware development and testing simple and easy, sharply reducing development time and time to market.

Summary of Features

USB-C support and USB PD support
Programmable MCU with 32-bit Arm^® Cortex^® M0, 128 KB Flash and 12 KB SRAM
Integrated legacy charging block for BC1.2 and Apple charge support
Integrated USB full-speed device controller
Integrated hardware crypto block for authentication
Integrated 8-bit ADC for voltage monitoring
Integrated current sense block
Integrated digital blocks configurable as I²C, SPI or UART
USB full-speed device controller
20 GPIOs that can operate from 1.71 V to 5.5 V
NFET gate drivers
System-level fault protection including OVP, UVP, VBUS to CC short protection, SCP, RCP, OCP
Clocks and oscillators
40-QFN package supporting industrial temperature range (-40°C to +105°C)
Packing type: tray