SRF 55V10S

Overview

Description:

Intelligent EEPROM with contactless interface (ISO/IEC 15693 or ISO/IEC 18000-3 Mode ) and security logic

Summary of Features:

Contactless Interface

  • Physical interface and anticollision compliant to ISO/IEC 15693

- contactless transmission of data and supply energy

- data rate up to 26 kbit/s - operation frequency: 13.56 MHz

- anticollision logic with identification of up to 30 Tags per second

- read / write distance up to 150 cm (influenced by external circuitry i.e. reader and inlay design)

 

EEPROM

  • Up to 10 kbit EEPROM memory
  • ISO mode - block organization of memory, accessible with ISO optional commands

- up to 248 blocks of user memory (block size 4 bytes) applicable for plain memory only

  • Custom mode - page organization of memory

- up to 128 pages of user memory (page size 8 bytes for data storage and 2 bytes for administration purposes)

- configurable number of sectors (1 to 15) and sector size (1 to 128 pages)

- configurable Key Area with up to 14 key pairs and configurable User Area

  • Unique IDentification number (UID)
  • EEPROM programming time per page < 4 ms
  • EEPROM endurance minimum 100,000 erase/write cycles (Values are temperature dependent)
  • Data retention minimum 10 years (Values are temperature dependent)

Value Counters: up to 65536

  • Each page in the User Area is configurable as a Value Counter
  • Support of Anti-Tearing

 

Security Features

  • State-of-the-art challenge and response security algorithm

- 2-way mutual authentication with 64-bit key

- 2 keys per sector enable hierarchical key management

- multi-level security structure possible

- individual access rights for each key within a sector of each page

- only one sector can be accessed at a time

- 32 bit message authentication code (MAC) verifies data integrity

  • Transport key on chip delivery

 

Electrical characteristics

  • ESD protection minimum 2 kV
  • Ambient temperature -25°C ... +70°C (for the chip)
  • Chip capacitance 23.5 pF ± 5%
  • High on-chip capacitance chip available (97pF ± 5%) allowing small tag antenna designs

 

Development Tool

  • Evaluation Kit my-d™ including my-d™ manager software
     
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