Welcome to our "Smart power challenge"!
The “Smart power challenge” is an analog design competition where participants can optimize and improve the functionality of an Infineon Smart power technology through their own suggestions. Infineon provides public access to its chip design and invites teams of designers to adapt this design in order to improve certain performance parameters. The results of these teams will be implemented in a shared reticle and corresponding wafers will be produced. Furthermore, the produced chips will be made available to the design teams to verify the expected performance improvement by measurement.
We invite groups from universities all over Europe consisting of at least one professor who teaches analog design and together with his students (3+) who have sufficient basic knowledge in this field to perform such a task under supervision.
The application is made by a professor via registration on the IFAT IPCEI website (URL), who will subsequently carry out this project as part of a course at his university. The application deadline is June 30th 2022 and applicants will receive a detailed project description to be used for the call for proposals at the university in question. The professor/academic supervisor will select the participating students.
The participating groups receive an introduction to the concept and layout of the Smart power chip technology as well as the concrete formulation of the task (the performance parameters to be optimized) during a special training ("Infineon Special Summer School").
For the period of implementation (October 2022 to January 2023), the participating students receive a scholarship from Infineon.
A jury of experts from Infineon Austria decides on advancement to the next level: the Tape Out. The four best design proposals will be integrated into a shared reticle (February 2023), which will be used to produce the chips in Infineon's production.
The wafers will be manufactured and assembled in chip packages by September 2023. The verification of the performance will be done by the student groups.
The students gain insight into an Infineon smart power chip technology through special training and thus access to practical state-of-the-art knowledge of the industry. During their work on the design competition, they will receive an Infineon scholarship.
The results of the design and the metrological verification of the produced chips will be published together with Infineon.
By participating in this "Smart power challenge", the students gain additional knowledge from industrial practice, which significantly increases their professional qualification in the field of analog design and significantly increases their entry into the professional world.
