Source-Down PQFN package
OptiMOS™ power MOSFET Source-Down family with industry leading RDS(on) and superior thermal performance - PQFN (Power Quad Flat No-lead) improved
Infineon’s OptiMOS™ low-voltage power MOSFETs present an innovative and improved PQFN package concept with Source-Down technology. With this new package, the silicon is flipped upside down inside of the component. This leads to the source potential connected to the PCB over the thermal pad instead of the drain potential.
The OptiMOS™ power MOSFET 3.3x3.3 mm2 Source-Down package is now available in 25 V-150 V in BSC (bottom-side cooling) and in DSC (dual-side cooling).
This new technology comes in two different footprint versions: a Source-Down version and a Source-Down Center-Gate version which is specifically optimized for parallelization. Compared to alternative solutions, Source-Down offers benefits like lower RDS(on) and improved thermal performance. Additionally, less active cooling and a more effective layout for thermal management is provided through Source-Down technology. The OptiMOS™ low-voltage power MOSFET family in PQFN 3.3x3.3 Source-Down targets drives, telecom, SMPS and server applications.
Key features
- Low RDS(on) in a small package
- Low gate charge
- Super logic level (2.5 V) and logic level (4.5 V) availability
Key benefits
- Board space reduction
- Reduction in switching and driver losses
- Gate drive flexibility
Key features:
- Low RDS(on) in a small package
- Low gate charge
- Super logic level (2.5 V) and logic level (4.5 V) availability
- Supports dual-side cooling (exposed clip)
Key benefits:
- Board space reduction
- Reduction in switching and driver losses
- Gate drive flexibility
- Provides increased power dissipation capability compared to overmolded variants
Explore the 3D visualization of the innovative Infineon Source-Down packages!
