Synchronous SRAM with ECC
Overview
QDR-IV Solution provides fast random memory access to exablaze's exalink fusion switch
Infineon's Synchronous SRAMs with ECC are the only high density Standard Sync/NoBL™ SRAMs in the market to be offered with the reliability of on chip error detection and correction.
- Provides a FIT rate of <0.01 FIT/Mb that is 1,000x lower than a standard SRAM without ECC
- Offers pin-to-pin compatibility with Infineon's existing products to simplify design
- Provides an RTR of 250 MT/s with an active power consumption of 1.05 W
- Available in Standard Sync and NoBL™ architectures
- Error-Correcting Code (ECC) to detect and correct single-bit errors
- Ensures a FIT rate of <0.01 FIT/Mb that is 1,000x lower than a standard SRAM without ECC
- Available in two voltage options: 2.5/3.3 V
- 165 BGA and 100 TQFP options available
- Industry-standard, RoHS compliant packages
- Industrial and commercial temperature grades
- Minimize your memory power consumption
Active power ~20% lower than the next closest competition
Lowest standby current across all competition - Form, fit and function compatible with our 90-nm products
- 36 MB parts in Production
- 18 MB sampling now
- Form, fit and function compatible with existing 90-nm Synchronous SRAM
- Available in industry standard 100 pin TQFP and 165 BGA packages
- Available in industrial and commercial grades
- 36 MB in Production and 18M Sampling now
- Visit the Synchronous SRAM with ECC web page to learn more
- Download the Synchronous SRAM roadmap and Synchronous SRAM with ECC product Overview
- Request a preliminary datasheet and contact sales
- Start your design using Infineon Synchronous SRAM with ECC
- Join the Infineon Developer Community
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