Voltage Comparator (Comp_PDL)
The Voltage Comparator Component (Comp_PDL) provides a hardware solution to compare two analog input voltages. The output is sampled in software or routed to a digital Component. There are three-speed levels to allow optimizing for speed or power consumption. A reference or external voltage can be connected to either input terminals.
The input offset is designed to be less than 1 mV over temperature and voltage. The Component supports a 10 mV input hysteresis that can be enabled.
The comparator can operate in Deep Sleep mode and its interrupt can wake up the device from Deep Sleep mode.
- Low input offset
- Multiple power/speed levels
- Operates in Deep Sleep mode
- Output can be routed to digital logic blocks or device pins
- Multiple interrupt edge modes