Infineon Announces 10 Gbps MAC for Resilient Packet Ring Networks OC-192 MAC Chip Implements SRP for 10 Gbps Ring-Based Packet Internetworking
Munich, Germany May 21, 2002 - Infineon Technologies (FSE/NYSE: IFX), a leading provider of communications ICs and fiber optics components, today unveiled its Rhea Resilient Packet Ring media access controller (MAC), a packet-optimized transport engine that implements the Spatial Reuse Protocol (SRP) for ring-based fiber optic networks. The Rhea MAC will enable the deployment of the first generation of 10 gigabit-per-second (Gbps) OC-192 Resilient Packet Rings (RPRs) in metropolitan area networks (MANs) and wide area networks (WANs).
The RPR technology, currently being standardized in the IEEE 802.17 committee, is gaining wide acceptance in systems that extend Gigabit Ethernet into the MAN and WAN environment. It is a Layer Two MAC technology that combines the low cost and simplicity of packet-based networking with the reliability, bandwidth, and scalability of optical networks. RPR technology will play a critical role in allowing service providers to create high-speed networks that efficiently transport voice and data traffic while lowering both capital and on-going operational expenses.
The Rhea Resilient Ring MAC implements SRP technology for ring-based packet internetworking that is open and freely available as IETF Informational RFC 2892. It makes more efficient use of available bandwidth than fixed-time-slot protocols by statistically multiplexing traffic. Furthermore, it delivers scalability, reliability, and simplicity to packet-based MANs and WANs. Industry analyst firm Gartner Dataquest last year projected that RPR SRP semiconductor market revenues will grow by 198 percent between 2000 and 2005, representing a large potential $175.5 million in revenues by 2005.
"The Rhea MAC, Infineons initial entry into the RPR market, will pave the way for additional products with even greater degrees of integration, functionality and capabilities to meet growing market demand," said Christian Scherp, Vice President of Marketing of Infineons Optical Networking Business Unit. "Creating solutions to enable RPR networks is another step in achieving our goal of delivering standards-based products to the optical networking industry. The Rhea MAC is a significant addition to our 10 Gbps product portfolio, which allows service providers to quickly and cost-effectively deploy revenue-generating networks."
The Rhea chip is a high-speed SRP MAC that operates at either OC-192 (10 Gbps) or OC-48 (2.488 Gbps) rates, and supports both Packet Over SONET (POS) and native Ethernet formats in addition to SRP. Its operating modes include dual-ring, wrap, pass-through, transparent, and passive and active sniffer.
An OIF SPI-4 Phase 1 receive/transmit framer host interface performs such functions as packet filtering, data and control bit parity checking, and traffic flow monitoring. Internal transit buffers are provided for low (1MB) and high (32KB) priority packets, and a 16-bit asynchronous microprocessor interface operating at up to 100 MHz allows sending and receiving of Intelligent Protection Switching (IPS) and topology packets. Inter-board communication is made possible by an XGMII 10 Gbps interface.
The Rhea Resilient Ring MAC is packaged in an 899-pin Hyper BGA Flip Chip. Engineering samples are available now, with volume pricing at US$495.
The RPR technology, currently being standardized in the IEEE 802.17 committee, is gaining wide acceptance in systems that extend Gigabit Ethernet into the MAN and WAN environment. It is a Layer Two MAC technology that combines the low cost and simplicity of packet-based networking with the reliability, bandwidth, and scalability of optical networks. RPR technology will play a critical role in allowing service providers to create high-speed networks that efficiently transport voice and data traffic while lowering both capital and on-going operational expenses.
The Rhea Resilient Ring MAC implements SRP technology for ring-based packet internetworking that is open and freely available as IETF Informational RFC 2892. It makes more efficient use of available bandwidth than fixed-time-slot protocols by statistically multiplexing traffic. Furthermore, it delivers scalability, reliability, and simplicity to packet-based MANs and WANs. Industry analyst firm Gartner Dataquest last year projected that RPR SRP semiconductor market revenues will grow by 198 percent between 2000 and 2005, representing a large potential $175.5 million in revenues by 2005.
"The Rhea MAC, Infineons initial entry into the RPR market, will pave the way for additional products with even greater degrees of integration, functionality and capabilities to meet growing market demand," said Christian Scherp, Vice President of Marketing of Infineons Optical Networking Business Unit. "Creating solutions to enable RPR networks is another step in achieving our goal of delivering standards-based products to the optical networking industry. The Rhea MAC is a significant addition to our 10 Gbps product portfolio, which allows service providers to quickly and cost-effectively deploy revenue-generating networks."
Rhea Resilient Packet Ring MAC Features
The Rhea chip is a high-speed SRP MAC that operates at either OC-192 (10 Gbps) or OC-48 (2.488 Gbps) rates, and supports both Packet Over SONET (POS) and native Ethernet formats in addition to SRP. Its operating modes include dual-ring, wrap, pass-through, transparent, and passive and active sniffer.
An OIF SPI-4 Phase 1 receive/transmit framer host interface performs such functions as packet filtering, data and control bit parity checking, and traffic flow monitoring. Internal transit buffers are provided for low (1MB) and high (32KB) priority packets, and a 16-bit asynchronous microprocessor interface operating at up to 100 MHz allows sending and receiving of Intelligent Protection Switching (IPS) and topology packets. Inter-board communication is made possible by an XGMII 10 Gbps interface.
Packaging, Price and Availability
The Rhea Resilient Ring MAC is packaged in an 899-pin Hyper BGA Flip Chip. Engineering samples are available now, with volume pricing at US$495.
About Infineon
Infineon Technologies AG, Munich, Germany, offers semiconductor and system solutions for applications in the wired and wireless communications markets, for security systems and smartcards, for the automotive and industrial sectors, as well as memory products. With a global presence, Infineon operates in the US from San Jose, CA, in the Asia-Pacific region from Singapore and in Japan from Tokyo. In the fiscal year 2001 (ending September), the company achieved sales of Euro 5.67 billion with about 33,800 employees worldwide. Infineon is listed on the DAX index of the Frankfurt Stock Exchange and on the New York Stock Exchange (ticker symbol: IFX). Further information is available at www.infineon.com.
Copyright © 2002 Infineon Technologies North America Corp. All rights reserved. Infineon and the stylized Infineon Technologies design are registered trademarks and service marks of Infineon Technologies AG. Other product and brand names may be trademarks or registered trademarks of their respective owners.
Information Number
INFCOM200205.089e