--************************************************************************************** --** Copyright (c) 2004 Cypress Semiconductor --** All rights reserved. --** --** File Name: cyv15g0203tb.bsdl --** Description: Boundary Scan Description Language file for JTAG arch. --** --** Part #: CYV15G0203TB --** Part Function: Independent Clock Dual HOTLink-II Serializer --** --** Release: 1.1 --** Last Updated: July 12, 2004 --** Author: Lucy Jin, (wjn@cypress.com). --** Tool: Synopsys BSD Compiler --** --** Notes: RXCLK- pins do not have a BSR cell but are always the inverse of --** RXCLK+ pins. --** The REFCLK+/- differential port has a single BSR cell after the --** clock buffer output single ended CMOS. --** --** Queries to Author or Cypress Datacom Applications http://www.cypress.com/support --** --************************************************************************************** entity cyv15g0203tb is -- This section identifies the default device package selected. generic (PHYSICAL_PIN_MAP: string:= "BL256"); -- This section declares all the ports in the design. port ( WREN : in bit; LTEN : in bit; LDTDEN : in bit; REFCLKAp : in bit; REFCLKBp : in bit; RESERVED_1 : linkage bit; RESERVED_2 : linkage bit; RESERVED_3 : linkage bit; RESERVED_4 : linkage bit; RESERVED_5 : linkage bit; RESERVED_6 : linkage bit; RESERVED_7 : linkage bit; RESERVED_8 : linkage bit; RESERVED_9 : linkage bit; RESERVED_10 : linkage bit; RESERVED_11 : linkage bit; RESERVED_12 : linkage bit; RESERVED_13 : linkage bit; RESERVED_14 : linkage bit; RESERVED_15 : linkage bit; RESERVED_16 : linkage bit; RESERVED_17 : in bit; RESERVED_18 : in bit; RESERVED_19 : in bit; RESERVED_20 : in bit; RESERVED_21 : in bit; RESERVED_22 : in bit; RESERVED_23 : in bit; RESERVED_24 : in bit; RESERVED_25 : buffer bit; RESERVED_26 : buffer bit; RESERVED_27 : in bit; RESERVED_28 : in bit; RESERVED_29 : buffer bit; RESERVED_30 : buffer bit; RESERVED_31 : buffer bit; RESERVED_32 : in bit; RESERVED_33 : in bit; RESERVED_34 : buffer bit; RESERVED_35 : buffer bit; RESERVED_36 : buffer bit; RESERVED_37 : buffer bit; RESERVED_38 : buffer bit; RESERVED_39 : buffer bit; RESERVED_40 : linkage bit; RESERVED_41 : buffer bit; RESERVED_42 : buffer bit; RESERVED_43 : buffer bit; RESERVED_44 : buffer bit; RESERVED_45 : buffer bit; RESERVED_46 : in bit; RESERVED_47 : buffer bit; RESERVED_48 : buffer bit; RESERVED_49 : buffer bit; RESERVED_50 : linkage bit; RESERVED_51 : buffer bit; RESERVED_52 : buffer bit; RESERVED_53 : in bit; RESERVED_54 : buffer bit; RESERVED_55 : in bit; RESERVED_56 : linkage bit; RESERVED_57 : buffer bit; RESERVED_58 : buffer bit; RESERVED_59 : buffer bit; RESERVED_60 : buffer bit; RESERVED_61 : buffer bit; RESERVED_62 : buffer bit; RESERVED_63 : buffer bit; RESERVED_64 : buffer bit; RESERVED_65 : linkage bit; RESERVED_66 : buffer bit; RESERVED_67 : buffer bit; RESERVED_68 : buffer bit; RESERVED_69 : buffer bit; RESERVED_70 : buffer bit; RESERVED_71 : buffer bit; RESERVED_72 : buffer bit; RESERVED_73 : buffer bit; RESERVED_74 : buffer bit; RESERVED_75 : buffer bit; RESERVED_76 : buffer bit; RESERVED_77 : buffer bit; RESERVED_78 : buffer bit; RESERVED_79 : buffer bit; RESERVED_80 : linkage bit; RESERVED_81 : buffer bit; RESERVED_82 : buffer bit; RESERVED_83 : buffer bit; RESERVED_84 : buffer bit; RESERVED_85 : buffer bit; RESERVED_86 : buffer bit; RESERVED_87 : buffer bit; RESERVED_88 : buffer bit; RESERVED_89 : buffer bit; RESERVED_90 : buffer bit; RESERVED_91 : linkage bit; RESERVED_92 : buffer bit; RESERVED_93 : buffer bit; RESETn : in bit; SCANEN : in bit; SPDSELA : in bit; SPDSELB : in bit; TCLK : in bit; TDI : in bit; TMEN : in bit; TMS : in bit; TRSTn : in bit; TXCLKA : in bit; TXCLKB : in bit; ADDR : in bit_vector (0 to 2); DATA : in bit_vector (0 to 3); TXDA : in bit_vector (0 to 9); TXDB : in bit_vector (0 to 9); TDO : out bit; TXCLKOA : buffer bit; TXCLKOB : buffer bit; TXERRA : buffer bit; TXERRB : buffer bit; NC : linkage bit; OUTA1n : linkage bit; OUTA1p : linkage bit; OUTA2n : linkage bit; OUTA2p : linkage bit; OUTB1n : linkage bit; OUTB1p : linkage bit; OUTB2n : linkage bit; OUTB2p : linkage bit; REFCLKAn : linkage bit; REFCLKBn : linkage bit; VCC : linkage bit_vector (0 to 47); GND : linkage bit_vector (0 to 55) ); use STD_1149_1_1994.all; attribute COMPONENT_CONFORMANCE of cyv15g0203tb: entity is "STD_1149_1_1993"; attribute PIN_MAP of cyv15g0203tb: entity is PHYSICAL_PIN_MAP; -- This section specifies the pin map for each port. This information -- is extracted from the port-to-pin map file that was read in using -- the "read_pin_map" command. constant BL256: PIN_MAP_STRING := "WREN : G2," & "LTEN : D18," & "LDTDEN : C17," & "REFCLKAp : W18," & "REFCLKBp : V11," & "RESERVED_1 : A1," & "RESERVED_2 : A2," & "RESERVED_3 : A3," & "RESERVED_4 : A4," & "RESERVED_5 : A6," & "RESERVED_6 : A18," & "RESERVED_7 : A20," & "RESERVED_8 : B2," & "RESERVED_9 : B4," & "RESERVED_10 : B9," & "RESERVED_11 : B11," & "RESERVED_12 : B14," & "RESERVED_13 : B17," & "RESERVED_14 : B18," & "RESERVED_15 : B19," & "RESERVED_16 : B20," & "RESERVED_17 : C6," & "RESERVED_18 : C7," & "RESERVED_19 : C9," & "RESERVED_20 : C10," & "RESERVED_21 : C14," & "RESERVED_22 : D7," & "RESERVED_23 : D15," & "RESERVED_24 : D17," & "RESERVED_25 : F1," & "RESERVED_26 : F2," & "RESERVED_27 : F4," & "RESERVED_28 : F17," & "RESERVED_29 : F18," & "RESERVED_30 : F19," & "RESERVED_31 : F20," & "RESERVED_32 : G17," & "RESERVED_33 : G18," & "RESERVED_34 : G20," & "RESERVED_35 : J17," & "RESERVED_36 : J18," & "RESERVED_37 : J19," & "RESERVED_38 : J20," & "RESERVED_39 : K1," & "RESERVED_40 : K2," & "RESERVED_41 : K17," & "RESERVED_42 : K18," & "RESERVED_43 : K19," & "RESERVED_44 : K20," & "RESERVED_45 : L1," & "RESERVED_46 : L2," & "RESERVED_47 : L3," & "RESERVED_48 : L17," & "RESERVED_49 : L18," & "RESERVED_50 : L19," & "RESERVED_51 : M1," & "RESERVED_52 : M2," & "RESERVED_53 : M3," & "RESERVED_54 : M4," & "RESERVED_55 : M17," & "RESERVED_56 : M18," & "RESERVED_57 : M19," & "RESERVED_58 : P1," & "RESERVED_59 : P2," & "RESERVED_60 : P3," & "RESERVED_61 : P4," & "RESERVED_62 : R1," & "RESERVED_63 : R2," & "RESERVED_64 : R3," & "RESERVED_65 : R4," & "RESERVED_66 : U6," & "RESERVED_67 : U7," & "RESERVED_68 : U17," & "RESERVED_69 : U19," & "RESERVED_70 : U20," & "RESERVED_71 : V4," & "RESERVED_72 : V6," & "RESERVED_73 : V7," & "RESERVED_74 : V9," & "RESERVED_75 : V17," & "RESERVED_76 : V18," & "RESERVED_77 : V19," & "RESERVED_78 : V20," & "RESERVED_79 : W3," & "RESERVED_80 : W4," & "RESERVED_81 : W6," & "RESERVED_82 : W7," & "RESERVED_83 : W11," & "RESERVED_84 : W17," & "RESERVED_85 : W19," & "RESERVED_86 : W20," & "RESERVED_87 : Y3," & "RESERVED_88 : Y4," & "RESERVED_89 : Y6," & "RESERVED_90 : Y7," & "RESERVED_91 : Y12," & "RESERVED_92 : Y19," & "RESERVED_93 : Y20," & "RESETn : D2," & "SCANEN : D19," & "SPDSELA : G19," & "SPDSELB : C15," & "TCLK : D1," & "TDI : C1," & "TMEN : D20," & "TMS : C2," & "TRSTn : C18," & "TXCLKA : Y11," & "TXCLKB : Y2," & "ADDR : (U10, W10, W9)," & "DATA : (C12, D11, C11, D10)," & "TXDA : (Y14, U12, W14, V14, U14, Y15, W15, V15, U15, U9)," & "TXDB : (U1, U2, U3, V1, V2, W1, Y1, W2, V3, U4)," & "TDO : C20," & "TXCLKOA : V12," & "TXCLKOB : Y9," & "TXERRA : W12," & "TXERRB : Y17," & "NC : Y10," & "OUTA1n : A12," & "OUTA1p : B12," & "OUTA2n : A15," & "OUTA2p : B15," & "OUTB1n : A7," & "OUTB1p : B7," & "OUTB2n : A10," & "OUTB2p : B10," & "REFCLKAn : Y18," & "REFCLKBn : U11," & "VCC : (A19, A17, A16, A5, B16, B6, B5, B3, B1, C16, C5, C4, C3, D16, D6, D5, D4, D3, " & " E20, E19, E18, E17, E4, E3, E2, E1, F3," & " R20, R19, R18, R17, T20, T19, T18, T17, T4, T3, T2, T1, " & " U18, U16, U5, V16, V5, W16, W5, Y16, Y5)," & "GND : (A14, A13, A11, A9, A8, B13, B8, C19, C13, C8, D14, D13, D12, D9, D8, " & " G4, G3, G1, H20, H19, H18, H17, H4, H3, H2, H1, J4, J3, J2, J1," & " K4, K3, L20, L4, M20, N20, N19, N18, N17, N4, N3, N2, N1, " & " P20, P19, P18, P17, U13, U8, V13, V10, V8, W13, W8, Y13, Y8)"; -- This section specifies the TAP ports. -- For the TAP TCK port, the parameters in the brackets are: -- First Field : Maximum TCK frequency. -- Second Field: Allowable states TCK may be stopped in. attribute TAP_SCAN_CLOCK of TCLK : signal is (10.0e6, BOTH); attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_RESET of TRSTn: signal is true; -- Specifies the number of bits in the instruction register. attribute INSTRUCTION_LENGTH of cyv15g0203tb: entity is 3; -- Specifies the boundary-scan instructions implemented in the -- design and their opcodes. attribute INSTRUCTION_OPCODE of cyv15g0203tb: entity is "BYPASS (111)," & "EXTEST (000)," & "SAMPLE (001)," & "IDCODE (010)," & "USER1 (011)"; -- Specifies the bit pattern that is loaded into the instruction -- register when the TAP controller passes through the Capture-IR -- state. The standard mandates that the two LSBs must be "01". -- The remaining bits are design specific. attribute INSTRUCTION_CAPTURE of cyv15g0203tb: entity is "001"; -- Specifies the bit pattern that is loaded into the DEVICE_ID -- register during the IDCODE instruction when the TAP controller -- passes through the Capture-DR state. attribute IDCODE_REGISTER of cyv15g0203tb: entity is "0000" & -- 4-bit version number "1100100000010000" & -- 16-bit part number "00000110100" & -- 11-bit identity of the manufacturer "1"; -- Required by IEEE Std 1149.1 -- This section specifies the test data register placed between TDI -- and TDO for each implemented instruction. attribute REGISTER_ACCESS of cyv15g0203tb: entity is "BYPASS (BYPASS)," & "BOUNDARY (EXTEST, SAMPLE)," & "DEVICE_ID (IDCODE)," & "UTDR1[24] (USER1)"; -- Specifies the length of the boundary scan register. attribute BOUNDARY_LENGTH of cyv15g0203tb: entity is 150; -- The following list specifies the characteristics of each cell -- in the boundary scan register from TDI to TDO. -- The following is a description of the label fields: -- num : Is the cell number. -- cell : Is the cell type as defined by the standard. -- port : Is the design port name. Control cells do not -- have a port name. -- function: Is the function of the cell as defined by the -- standard. Is one of input, output2, output3, -- bidir, control or controlr. -- safe : Specifies the value that the BSR cell should be -- loaded with for safe operation when the software -- might otherwise choose a random value. -- ccell : The control cell number. Specifies the control -- cell that drives the output enable for this port. -- disval : Specifies the value that is loaded into the -- control cell to disable the output enable for -- the corresponding port. -- rslt : Resulting state. Shows the state of the driver -- when it is disabled. attribute BOUNDARY_REGISTER of cyv15g0203tb: entity is -- -- num cell port function safe [ccell disval rslt] -- "149 (BC_4, RESERVED_20, observe_only, X), " & "148 (BC_4, DATA(3), observe_only, X), " & "147 (BC_4, RESERVED_19, observe_only, X), " & "146 (BC_4, *, internal, X), " & "145 (BC_4, RESERVED_18, observe_only, X), " & "144 (BC_4, RESERVED_22, observe_only, X), " & "143 (BC_4, RESERVED_22, observe_only, X), " & "142 (BC_4, RESERVED_17, observe_only, X), " & "141 (BC_4, *, internal, X), " & "140 (BC_4, *, internal, X), " & "139 (BC_4, *, internal, X), " & "138 (BC_4, *, internal, X), " & "137 (BC_4, *, internal, X), " & "136 (BC_4, RESETn, observe_only, X), " & "135 (BC_1, RESERVED_25, output2, X), " & "134 (BC_1, RESERVED_26, output2, X), " & "133 (BC_4, *, internal, X), " & "132 (BC_4, RESERVED_27, observe_only, X), " & "131 (BC_4, *, internal, X), " & "130 (BC_4, *, internal, X), " & "129 (BC_4, *, internal, X), " & "128 (BC_4, WREN, observe_only, X), " & "127 (BC_4, *, internal, X), " & "126 (BC_4, *, internal, X), " & "125 (BC_4, *, internal, X), " & "124 (BC_4, *, internal, X), " & "123 (BC_4, *, internal, X), " & "122 (BC_4, *, internal, X), " & "121 (BC_4, *, internal, X), " & "120 (BC_1, RESERVED_47, output2, X), " & "119 (BC_4, RESERVED_46, observe_only, X), " & "118 (BC_4, RESERVED_53, observe_only, X), " & "117 (BC_1, RESERVED_54, output2, X), " & "116 (BC_1, RESERVED_52, output2, X), " & "115 (BC_1, RESERVED_51, output2, X), " & "114 (BC_1, RESERVED_45, output2, X), " & "113 (BC_1, RESERVED_39, output2, X), " & "112 (BC_1, RESERVED_58, output2, X), " & "111 (BC_1, RESERVED_59, output2, X), " & "110 (BC_1, RESERVED_60, output2, X), " & "109 (BC_1, RESERVED_61, output2, X), " & "108 (BC_1, RESERVED_62, output2, X), " & "107 (BC_1, RESERVED_63, output2, X), " & "106 (BC_1, RESERVED_64, output2, X), " & "105 (BC_4, TXDB(0), observe_only, X), " & "104 (BC_4, TXDB(1), observe_only, X), " & "103 (BC_4, TXDB(2), observe_only, X), " & "102 (BC_4, TXDB(3), observe_only, X), " & "101 (BC_4, TXDB(4), observe_only, X), " & "100 (BC_4, TXDB(5), observe_only, X), " & "99 (BC_4, TXDB(6), observe_only, X), " & "98 (BC_4, TXDB(7), observe_only, X), " & "97 (BC_4, TXDB(8), observe_only, X), " & "96 (BC_4, TXDB(9), observe_only, X), " & "95 (BC_4, TXCLKB, observe_only, X), " & "94 (BC_1, RESERVED_79, output2, X), " & "93 (BC_1, RESERVED_87, output2, X), " & "92 (BC_1, RESERVED_71, output2, X), " & "91 (BC_1, RESERVED_88, output2, X), " & "90 (BC_1, RESERVED_89, output2, X), " & "89 (BC_1, RESERVED_81, output2, X), " & "88 (BC_1, RESERVED_72, output2, X), " & "87 (BC_1, RESERVED_66, output2, X), " & "86 (BC_1, RESERVED_67, output2, X), " & "85 (BC_1, RESERVED_90, output2, X), " & "84 (BC_1, RESERVED_73, output2, X), " & "83 (BC_1, RESERVED_82, output2, X), " & "82 (BC_1, RESERVED_74, output2, X), " & "81 (BC_4, TXDA(9), observe_only, X), " & "80 (BC_4, ADDR(2), observe_only, X), " & "79 (BC_1, TXCLKOB, output2, X), " & "78 (BC_4, *, internal, X), " & "77 (BC_4, ADDR(1), observe_only, X), " & "76 (BC_4, REFCLKBp, observe_only, X), " & "75 (BC_1, TXERRA, output2, X), " & "74 (BC_4, ADDR(0), observe_only, X), " & "73 (BC_1, TXCLKOA, output2, X), " & "72 (BC_1, RESERVED_83, output2, X), " & "71 (BC_4, TXCLKA, observe_only, X), " & "70 (BC_4, TXDA(0), observe_only, X), " & "69 (BC_4, TXDA(1), observe_only, X), " & "68 (BC_4, TXDA(2), observe_only, X), " & "67 (BC_4, TXDA(3), observe_only, X), " & "66 (BC_4, TXDA(4), observe_only, X), " & "65 (BC_4, TXDA(5), observe_only, X), " & "64 (BC_4, TXDA(6), observe_only, X), " & "63 (BC_4, TXDA(7), observe_only, X), " & "62 (BC_4, TXDA(8), observe_only, X), " & "61 (BC_1, TXERRB, output2, X), " & "60 (BC_4, REFCLKAp, observe_only, X), " & "59 (BC_1, RESERVED_84, output2, X), " & "58 (BC_1, RESERVED_75, output2, X), " & "57 (BC_1, RESERVED_92, output2, X), " & "56 (BC_1, RESERVED_93, output2, X), " & "55 (BC_1, RESERVED_85, output2, X), " & "54 (BC_1, RESERVED_76, output2, X), " & "53 (BC_1, RESERVED_68, output2, X), " & "52 (BC_1, RESERVED_86, output2, X), " & "51 (BC_1, RESERVED_77, output2, X), " & "50 (BC_4, *, internal, X), " & "49 (BC_1, RESERVED_78, output2, X), " & "48 (BC_1, RESERVED_70, output2, X), " & "47 (BC_1, RESERVED_69, output2, X), " & "46 (BC_4, *, internal, X), " & "45 (BC_4, *, internal, X), " & "44 (BC_4, *, internal, X), " & "43 (BC_4, *, internal, X), " & "42 (BC_4, *, internal, X), " & "41 (BC_4, *, internal, X), " & "40 (BC_4, *, internal, X), " & "39 (BC_4, *, internal, X), " & "38 (BC_4, *, internal, X), " & "37 (BC_4, *, internal, X), " & "36 (BC_1, RESERVED_57, output2, X), " & "35 (BC_4, RESERVED_55, observe_only, X), " & "34 (BC_1, RESERVED_49, output2, X), " & "33 (BC_1, RESERVED_44, output2, X), " & "32 (BC_1, RESERVED_43, output2, X), " & "31 (BC_1, RESERVED_48, output2, X), " & "30 (BC_1, RESERVED_37, output2, X), " & "29 (BC_1, RESERVED_42, output2, X), " & "28 (BC_1, RESERVED_41, output2, X), " & "27 (BC_1, RESERVED_38, output2, X), " & "26 (BC_1, RESERVED_34, output2, X), " & "25 (BC_1, RESERVED_36, output2, X), " & "24 (BC_1, RESERVED_31, output2, X), " & "23 (BC_1, RESERVED_29, output2, X), " & "22 (BC_1, RESERVED_35, output2, X), " & "21 (BC_1, RESERVED_30, output2, X), " & "20 (BC_4, RESERVED_33, observe_only, X), " & "19 (BC_4, RESERVED_32, observe_only, X), " & "18 (BC_4, RESERVED_32, observe_only, X), " & "17 (BC_4, RESERVED_28, observe_only, X), " & "16 (BC_4, SPDSELA, observe_only, X), " & "15 (BC_4, SPDSELA, observe_only, X), " & "14 (BC_4, DATA(2), observe_only, X), " & "13 (BC_4, DATA(1), observe_only, X), " & "12 (BC_4, DATA(0), observe_only, X), " & "11 (BC_4, *, internal, X), " & "10 (BC_4, RESERVED_21, observe_only, X), " & "9 (BC_4, *, internal, X), " & "8 (BC_4, SPDSELB, observe_only, X), " & "7 (BC_4, SPDSELB, observe_only, X), " & "6 (BC_4, RESERVED_23, observe_only, X), " & "5 (BC_4, LDTDEN, observe_only, X), " & "4 (BC_4, RESERVED_24, observe_only, X), " & "3 (BC_4, LTEN, observe_only, X), " & "2 (BC_4, *, internal, X), " & "1 (BC_4, SCANEN, observe_only, X), " & "0 (BC_4, TMEN, observe_only, X) "; end cyv15g0203tb;