AN# |
Title |
Part# |
Kits |
Description |
AN57322 |
Interfacing SRAM with FX2LP over GPIF |
CY7C6801XA |
CY3684 |
This project describes how to configure FX2LP General Programmable Interface (GPIF) to interface to SRAM CY7C1399B. It describes how to create Read and Write GPIF waveforms using the provided tool, GPIF Designer. |
AN1193 |
Using Timer Interrupt in Infineon EZ-USB™ FX2LP Based Applications |
CY7C6801X |
CY3684 |
This project demonstrates the usage of FX2LP timer interrupts in their applications, using the framework based timer interrupt program written in C. When this program is run, you should be able to light the seven-segment LED on the FX2LP Development Board (CY3684) with a 0-9 count, and control the step rate using BULK OUT endpoint transfers from the EZ-USB™ Control Panel. |
AN4053 |
Streaming Data through Isochronous or Bulk Endpoints on EZ-USB™ FX2™ and FX2LP |
CY7C6801X/
CY7C6801XA |
CY3684 |
This project includes code to implement and exercise FX2LP high-bandwidth Endpoints, a companion PC application to measure the transfer rates. This project also demonstrates how to use the USB Frameworks to implement alternate USB settings, enabling the host to select different transfer rates. |
AN61345 |
Designing With EZ-USB™ FX2LP Slave FIFO Interface |
CY7C6801XA |
CY3684 |
This project provides a sample code to interface an FX2LP with FPGA using Slave FIFO interface. The project is implemented and tested with Xilinx Spartan® 6 FPGA. |
AN14558 |
Implementing an SPI Master on EZ-USB™ FX2LP |
CY7C6801XA |
CY3684 |
This project details two approaches (bit-banging approach using GPIO pins and the UART block approach) to implement SPI Master interface on FX2LP. |
AN65209 |
Getting Started with FX2LP |
CY7C6801XA |
CY3684 |
The Bulkloop project attached to this shows how to structure the FX2LP firmware to create a USB device. Much of the USB request handling is done by a provided USB Firmware Framework, with the user code required only for the specific application requirements. The bulkloop.c file contains a full USB device template that can serve as the basis for a custom application. |
AN58764 |
Implementing a Virtual COM Port Using FX2LP |
CY7C6801XA |
CY3684 |
This project describes the implementation of a virtual COM port device using FX2LP. |
AN66806 |
Getting Started with EZ-USB™ FX2LP GPIF |
CY7C6801XA |
CY3684 |
This project includes three examples demonstrating the General Programmable Interface (GPIF) design for FX2LP based applications, starting with a simple GPIF clock divider example. This project also includes an example for demonstrating the GPIF Manual mode and single read/write GPIF transactions over a 16-bit data bus. |
AN45471 |
Create Your Own USB Vendor Commands Using FX2LP |
CY7C6801XA |
CY3684 |
The project includes the example code showing the implementation of handling code for any vendor-specific custom requests (called vendor requests). This shows how to create a custom USB device and communicate with it using vendor requests. |
AN70983 |
Designing a Bulk Transfer Host Application for EZ-USB™ FX2LP/FX3 |
CY7C6801XA |
CY3684 |
This example demonstrates how to use the library for Microsoft .NET languages to implement host PC applications to communicate with FX2LP and FX3 devices. |
AN63787 |
EZ-USB™ FX2LP GPIF and Slave FIFO Configuration Examples Using an 8-Bit Asynchronous Interface |
CY7C6801XA |
CY3684 |
This project provides sample code demonstrating FX2LP GPIF and Slave configuration. This project is tested with two FX2LP development kits connected in a back-to-back setup, the first one acting in master (GPIF) mode and the second in slave mode. |
AN58069 |
Implementing an 8-Bit Parallel MPEG2-TS Interface Using Slave FIFO Mode in FX2LP |
CY7C6801XA |
CY3684 |
This project presents a design example to implement an 8-bit parallel MPEG2-TS interface using the Slave FIFO mode |
AN63620 |
Configuring a Xilinx Spartan-3E FPGA Over USB Using EZ-USB™ FX2LP |
CY7C6801XA |
CY3684 |
This project demonstrates a technique for dynamically configuring a Xilinx Spartan-3E Field Programmable Gate Array (FPGA) over USB using EZ-USB™ FX2LP. After the FPGA is configured, FX2LP can act as a high-speed data path between the USB host and the FPGA. |
AN64020 |
Creating a FX1/FX2LP Composite HID Device |
CY7C6801XA/
CY7C64713 |
CY3684 |
This project describes how to implement a composite human interface device (HID) using FX1/FX2LP. The example firmware explained here is a two-button mouse and a two-button keyboard function, using the four buttons on the FX1/FX2LP development board. The example firmware also has an interface which implements a loopback over bulk endpoint using Endpoint 6 and 8 to emphasize the flexibility and bandwidth capability of the device. |
AN61244 |
Firmware Optimization in EZ-USB™ |
CY7C6801X/
CY7C6801XA/
CY7C64713 |
CY3684/
CY3674 |
This project describes firmware optimization methods in EZ-USB™ using a demonstration firmware. |
AN78446 |
Interrupt Handling in EZ-USB™ FX2LP |
CY7C6801XA |
CY3684 |
This project explains the handling of three USB specific interrupts and external interrupts in EZ - USB FX2LP using sample code. |
AN58170 |
Code/Memory Banking Using EZ-USB™ |
CY7C6801X/
CY7C6801XA/
CY7C64713 |
CY3684/
CY3674 |
This project describes methods of overcoming 64 KB firmware size limitation, imposed by 16 bit address lines of EZ-USB™ 8051 core, using code/ memory banking. |
AN58009 |
Serial (UART) Port Debugging of FX1/FX2LP Firmware |
CY7C6801X/
CY7C6801XA/
CY7C64713 |
CY3684/
CY3674 |
This project describes the code to be added to FX2LP firmware for serial port debugging. This code enables the developer to print debug messages and real-time values of variables to the HyperTerminal program on a Windows computer or to capture it in a file using the UART in FX2LP. |
AN74505 |
EZ-USB™ FX2LP - Developing USB Application on MAC OS X using LIBUSB |
CY7C6801XA |
CY3684 |
This project describes how libusb-1.0 can be used to develop USB host application (Cocoa Application) on MAC OS X 10.6/10.7 for EZ-USB™ FX2LP products. This includes step-by-step procedure for developing a host application to communicate with FX2LP products. |
AN73609 |
EZ-USB™ FX2LP/ FX3 Developing Bulk-Loop Example on Linux |
CY7C6801XA |
CY3684 |
This project describes how libusb can be used to develop an USB host application on a Linux-based OS for EZ-USB™ FX2LP/ FX3 products. It includes a step-by-step procedure for developing the bulk-loop example. |
AN64465 |
West Bridge® Integration to Android on OMAP Zoom II MDP: RNDIS, CDC-ECM, and Mass Storage Functions |
CYWB022X |
CYWBDVK002AB |
This project includes a reference implementation of the USB composite device with Remote Network Driver Interface Specification (RNDIS), Communication Device Class - Ethernet Control Model (CDC-ECM), and mass storage functions. |
AN50963 |
EZ-USB™ FX1™/FX2LP Boot Options |
CY7C64713/
CY7C6801XA |
CY3674/
CY3684 |
AN50963 describes in detail the boot options available in EZ-USB™ FX1™/FX2LP USB 2.0 peripheral controllers. It explains the various methods to download the firmware into the FX1/FX2LP device. |