IGBT Modules - Technologies, Driver and Application (Second Edition) - page 293

Nevertheless, in a large number of applications, hardware solutions in which both
channels of a half-bridge are connected in such away that only one of the channels can
be turned on at the same time are preferable. This is also a requirement when the
control sends an on-signal to both channels. One example of a logical combination is
shown in
Additionally, the channels turn on with a delay, and not until the
complementary circuit has been turned off completely. This ensures that there are no
bridge short circuits ina half-bridge.
Dead times are usually set at between 1µs and 4µs. In IGBTs with blocking voltages
ranging from 3.3kV to 6.5kV, the delay times are longer, since the switching speeds are
Fig. 6.76
Example of half-bridge interlocking with delay time and minimum pulse
6.8.3 Errormessages, blocking timesand faultmemory
If a fault (e.g. under-voltage or aU
error) is detected in the gate drive, the gate drive
is supposed to turn off the affected channel. The supervising control should be notified
of the fault that has been identified at the same time. Some time passes before it can
respond and the channel affected by the faultmust remainblocked during this time.
There are different opinions as to how best to design for this. The basic principle is that
an identified fault must be notified. Driver IC or driver boards usually realizing this with
an "open collector" output. The fault can be saved in a fault memory and block the gate
drive. The gate drive cannot pulse again until the supervising control sends a reset.
Instead of a fault memory and a reset, the gate drive can be blocked for a pre-set time,
duringwhich thegatedrive is turned off and the supervising control has time to respond.
Once the blocking time has elapsed, the gate drive is ready to pulse again, whether or
not the supervising control has responded.
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