Infineon Ships Flexible Optical Networking Chip for Channel Aggregation and Interface Conversion; Affirms Commitment to High-Speed Communications Market
Munich, Germany, January 17, 2003 Infineon Technologies (FSE/NYSE: IFX) today announced the availability of the Titan 768MD, a flexible, multifunctional single-chip solution for high-speed line cards that can perform both interface conversion and serializer/deserializer (SerDes) operations. Infineon is shipping the Titan 768MD, announced in June 2002, to manufacturers of advanced datacom and telecom network equipment, affirming its strategic commitment to support customer investments in maintaining market advantage through the current economic downturn.
"In today's economic climate, telecom and datacom equipment vendors have severely constrained engineering budgets. They must minimize up-front engineering expenses and aggressively de-risk designs," said Allan Armstrong, director of communications semiconductors at industry analyst firm RHK, Inc. "By providing sixteen 4:1 serializers with deskew in a standard product, Infineon lets switch and linecard designers remove a key risk element from their designs. Whether they use ASICs or programmable logic, moving the high-speed interface off-chip allows them to use a less-expensive, lower risk technology."
The Titan 768MD has an inherently flexible architecture that allows it to be immediately useful as both a high-density SerDes in legacy systems and an interface converter in advanced switching and routing equipment, said Christian Scherp, Vice President of Marketing in the Optical Networking Business Unit at Infineon Technologies North America Corp. Our customers are taking advantage of this flexibility to enhance todays data communication systems, while looking at the potential for the same chip to provide scalable performance in future SONET systems with 10 Gbps and 40 Gbps channel data rates.
Infineons Titan 768MD can reduce overall cost and power consumption by performing functions in a single chip that would typically require several devices.
The Titan 768MD is ideal for use in a variety of SONET (Synchronous Optical Network) and data communications applications, including in 40 Gbps OC-768 line cards to perform SerDes Framer Interface Level 4 (SFI-4)-to-Level 5 (SFI-5) interface conversion. When performing narrowband SFI-5-to-SFI-4 conversion, 40 Gbps data throughput can be achieved in both directions across a network while leveraging investments in 10 Gbps framers. In addition, the flexible Titan 768MD can perform inverse multiplexing of the OC-768c payload from a router. When used with a high-speed framer and pointer processor, such as the Infineon Titan 19244, the Titan 768MD provides a two-chip OC-768 solution for line cards operating at a 40 Gbps throughput.
The Titan 768MD can also function as a high-density serializer/deserializer in router/switch line cards and backplanes to aggregate as many as sixty-four 622 Mbps channels into up to sixteen 2.5 Gbps channels, or to convert the 2.5 Gbps channels into 622 Mbps outputs. The chip allows OEMs to continue using legacy systems in which core logic is implemented as FPGAs (field-programmable gate arrays) with 622 Mbps interfaces, and provides a cost-effective migration path to higher rate line cards.
Integrated into the Titan 768MD are robust clock and data recovery mechanisms, skew compensation functions and a clock synthesis mechanism. Diagnostic features include Pseudo Random Binary Sequence (PRBS) generation and checking, digital loopback capabilities and support for IEEE 1149.1 JTAG testing. In addition, a microprocessor interface allows a CPU to access the registers for reset, setup, read, load, or to invoke built-in test functions.
The Titan 768MD is packaged in a 680-pin BGA. Samples are available now, with volume pricing expected to be in the US $600 range.
"In today's economic climate, telecom and datacom equipment vendors have severely constrained engineering budgets. They must minimize up-front engineering expenses and aggressively de-risk designs," said Allan Armstrong, director of communications semiconductors at industry analyst firm RHK, Inc. "By providing sixteen 4:1 serializers with deskew in a standard product, Infineon lets switch and linecard designers remove a key risk element from their designs. Whether they use ASICs or programmable logic, moving the high-speed interface off-chip allows them to use a less-expensive, lower risk technology."
The Titan 768MD has an inherently flexible architecture that allows it to be immediately useful as both a high-density SerDes in legacy systems and an interface converter in advanced switching and routing equipment, said Christian Scherp, Vice President of Marketing in the Optical Networking Business Unit at Infineon Technologies North America Corp. Our customers are taking advantage of this flexibility to enhance todays data communication systems, while looking at the potential for the same chip to provide scalable performance in future SONET systems with 10 Gbps and 40 Gbps channel data rates.
About the Titan 768MD
Infineons Titan 768MD can reduce overall cost and power consumption by performing functions in a single chip that would typically require several devices.
The Titan 768MD is ideal for use in a variety of SONET (Synchronous Optical Network) and data communications applications, including in 40 Gbps OC-768 line cards to perform SerDes Framer Interface Level 4 (SFI-4)-to-Level 5 (SFI-5) interface conversion. When performing narrowband SFI-5-to-SFI-4 conversion, 40 Gbps data throughput can be achieved in both directions across a network while leveraging investments in 10 Gbps framers. In addition, the flexible Titan 768MD can perform inverse multiplexing of the OC-768c payload from a router. When used with a high-speed framer and pointer processor, such as the Infineon Titan 19244, the Titan 768MD provides a two-chip OC-768 solution for line cards operating at a 40 Gbps throughput.
The Titan 768MD can also function as a high-density serializer/deserializer in router/switch line cards and backplanes to aggregate as many as sixty-four 622 Mbps channels into up to sixteen 2.5 Gbps channels, or to convert the 2.5 Gbps channels into 622 Mbps outputs. The chip allows OEMs to continue using legacy systems in which core logic is implemented as FPGAs (field-programmable gate arrays) with 622 Mbps interfaces, and provides a cost-effective migration path to higher rate line cards.
Integrated into the Titan 768MD are robust clock and data recovery mechanisms, skew compensation functions and a clock synthesis mechanism. Diagnostic features include Pseudo Random Binary Sequence (PRBS) generation and checking, digital loopback capabilities and support for IEEE 1149.1 JTAG testing. In addition, a microprocessor interface allows a CPU to access the registers for reset, setup, read, load, or to invoke built-in test functions.
Packaging, Price and Availability
The Titan 768MD is packaged in a 680-pin BGA. Samples are available now, with volume pricing expected to be in the US $600 range.
About Infineon
Infineon Technologies AG, Munich, Germany, offers semiconductor and
system solutions for the automotive and industrial sectors, for applications in the wired communications markets, secure mobile solutions as well as memory products. With a global presence, Infineon operates in the US from San Jose, CA, in the Asia-Pacific region from Singapore and in Japan from Tokyo. In the fiscal year 2002 (ending September), the company achieved sales of Euro 5.21 billion with about 30,400 employees worldwide. Infineon is listed on the DAX index of the Frankfurt Stock Exchange and on the New York Stock Exchange (ticker symbol: IFX). Further information is available at www.infineon.com.
Information Number
INFCOM200301.036 e